work towards rvc 1.8

[riscv-isa-sim.git] / riscv / insns / c_slli.h

diff --git a/riscv/insns/c_slli.h b/riscv/insns/c_slli.h
index 6bbefb18ac312e7d0bd0ec3e828f81d2cf493289..24fbb1335be3060dd7b9b1d2c2dd96a1585608ba 100644 (file)
--- a/riscv/insns/c_slli.h
+++ b/riscv/insns/c_slli.h
@@ -1,3 +1,3 @@
 require_extension('C');
-require(insn.rvc_imm() < xlen);
-WRITE_RD(sext_xlen(RVC_RS1 << insn.rvc_imm()));
+require(insn.rvc_zimm() < xlen);
+WRITE_RD(sext_xlen(RVC_RS1 << insn.rvc_zimm()));