Support setting ISA/subsets with --isa flag
[riscv-isa-sim.git] / riscv / insns / c_sw.h
index 34deb9dc0c309ecef06814b8aeee884f12ae45e1..3073e9d623dcb98265b2c1d1d3c59f51530ab386 100644 (file)
@@ -1,2 +1,2 @@
-require_rvc;
+require_extension('C');
 MMU.store_uint32(RVC_RS1S + insn.rvc_lw_imm(), RVC_RS2S);