Add debug module authentication.

[riscv-isa-sim.git] / riscv / jtag_dtm.cc

diff --git a/riscv/jtag_dtm.cc b/riscv/jtag_dtm.cc
index 84182bbf02b7fcd361e5d1fd5329b2edc85456f1..365528a49a7566919c7b0742151f3fab846b5435 100644 (file)
--- a/riscv/jtag_dtm.cc
+++ b/riscv/jtag_dtm.cc
@@ -14,7 +14,8 @@
 enum {
   IR_IDCODE=1,
   IR_DTMCONTROL=0x10,
-  IR_DBUS=0x11
+  IR_DBUS=0x11,
+  IR_RESET=0x1c
 };
 
 #define DTMCONTROL_VERSION      0xf
@@ -40,14 +41,14 @@ enum {
 jtag_dtm_t::jtag_dtm_t(debug_module_t *dm) :
   dm(dm),
   _tck(false), _tms(false), _tdi(false), _tdo(false),
-  dtmcontrol((abits << DTM_DTMCONTROL_ABITS_OFFSET) | 1),
-  dmi(DMI_OP_STATUS_FAILED << DTM_DMI_OP_OFFSET),
-  state(TEST_LOGIC_RESET)
+  dtmcontrol((abits << DTM_DTMCS_ABITS_OFFSET) | 1),
+  dmi(DMI_OP_STATUS_SUCCESS << DTM_DMI_OP_OFFSET),
+  _state(TEST_LOGIC_RESET)
 {
 }
 
 void jtag_dtm_t::reset() {
-  state = TEST_LOGIC_RESET;
+  _state = TEST_LOGIC_RESET;
 }
 
 void jtag_dtm_t::set_pins(bool tck, bool tms, bool tdi) {
@@ -73,7 +74,7 @@ void jtag_dtm_t::set_pins(bool tck, bool tms, bool tdi) {
   if (!_tck && tck) {
     // Positive clock edge.
 
-    switch (state) {
+    switch (_state) {
       case SHIFT_DR:
         dr >>= 1;
         dr |= (uint64_t) _tdi << (dr_length-1);
@@ -85,8 +86,8 @@ void jtag_dtm_t::set_pins(bool tck, bool tms, bool tdi) {
       default:
         break;
     }
-    state = next[state][_tms];
-    switch (state) {
+    _state = next[_state][_tms];
+    switch (_state) {
       case TEST_LOGIC_RESET:
         ir = IR_IDCODE;
         break;
@@ -104,18 +105,19 @@ void jtag_dtm_t::set_pins(bool tck, bool tms, bool tdi) {
       case SHIFT_IR:
         _tdo = ir & 1;
         break;
-      case UPDATE_IR:
-        break;
+      //case UPDATE_IR:
+        //if (ir == IR_RESET) {
+          // Make a reset happen
+        //}
+        //break;
       default:
         break;
     }
   }
 
-  /*
   D(fprintf(stderr, "state=%2d, tdi=%d, tdo=%d, tms=%d, tck=%d, ir=0x%02x, "
         "dr=0x%lx\n",
-        state, _tdi, _tdo, _tms, _tck, ir, dr));
-        */
+        _state, _tdi, _tdo, _tms, _tck, ir, dr));
 
   _tck = tck;
   _tms = tms;