Support setting ISA/subsets with --isa flag

[riscv-isa-sim.git] / riscv / processor.cc

diff --git a/riscv/processor.cc b/riscv/processor.cc
index 51e56b1a46629a949de6a151b679ca9540d7dadb..11872656059c93f4556b0b8477b919937904a7ab 100644 (file)
--- a/riscv/processor.cc
+++ b/riscv/processor.cc
@@ -19,13 +19,17 @@
 #undef STATE
 #define STATE state
 
-processor_t::processor_t(sim_t* _sim, mmu_t* _mmu, uint32_t _id)
-  : sim(_sim), mmu(_mmu), ext(NULL), disassembler(new disassembler_t),
-    id(_id), run(false), debug(false)
+processor_t::processor_t(const char* isa, sim_t* sim, uint32_t id)
+  : sim(sim), ext(NULL), disassembler(new disassembler_t),
+    id(id), run(false), debug(false)
 {
-  reset(true);
+  parse_isa_string(isa);
+
+  mmu = new mmu_t(sim->mem, sim->memsz);
   mmu->set_processor(this);
 
+  reset(true);
+
   #define DECLARE_INSN(name, match, mask) REGISTER_INSN(this, name, match, mask)
   #include "encoding.h"
   #undef DECLARE_INSN
@@ -44,19 +48,62 @@ processor_t::~processor_t()
   }
 #endif
 
+  delete mmu;
   delete disassembler;
 }
 
+static void bad_isa_string(const char* isa)
+{
+  fprintf(stderr, "error: bad --isa option %s\n", isa);
+  abort();
+}
+
+void processor_t::parse_isa_string(const char* isa)
+{
+  const char* p = isa;
+  const char* all_subsets = "IMAFDC";
+
+  max_xlen = 64;
+  if (strncmp(p, "RV32", 4) == 0)
+    max_xlen = 32, p += 4;
+  else if (strncmp(p, "RV64", 4) == 0)
+    p += 4;
+  else if (strncmp(p, "RV", 2) == 0)
+    p += 2;
+
+  if (!*p)
+    p = all_subsets;
+  else if (*p != 'I')
+    bad_isa_string(isa);
+
+  memset(subsets, 0, sizeof(subsets));
+
+  while (*p) {
+    if (auto next = strchr(all_subsets, *p)) {
+      subsets[(int)*p] = true;
+      all_subsets = next + 1;
+      p++;
+    } else if (*p == 'X') {
+      const char* ext = p+1, *end = ext;
+      while (islower(*end))
+        end++;
+      register_extension(find_extension(std::string(ext, end - ext).c_str())());
+      p = end;
+    } else {
+      bad_isa_string(isa);
+    }
+  }
+
+  if (supports_extension('D') && !supports_extension('F'))
+    bad_isa_string(isa);
+}
+
 void state_t::reset()
 {
   memset(this, 0, sizeof(*this));
   mstatus = set_field(mstatus, MSTATUS_PRV, PRV_M);
   mstatus = set_field(mstatus, MSTATUS_PRV1, PRV_S);
   mstatus = set_field(mstatus, MSTATUS_PRV2, PRV_S);
-#ifdef RISCV_ENABLE_64BIT
-  mstatus = set_field(mstatus, MSTATUS64_UA, UA_RV64);
-  mstatus = set_field(mstatus, MSTATUS64_SA, UA_RV64);
-#endif
   pc = 0x100;
   load_reservation = -1;
 }
@@ -79,7 +126,7 @@ void processor_t::reset(bool value)
     return;
   run = !value;
 
-  state.reset(); // reset the core
+  state.reset();
   set_csr(CSR_MSTATUS, state.mstatus);
 
   if (ext)
@@ -88,7 +135,7 @@ void processor_t::reset(bool value)
 
 void processor_t::raise_interrupt(reg_t which)
 {
-  throw trap_t(((reg_t)1 << 63) | which);
+  throw trap_t(((reg_t)1 << (max_xlen-1)) | which);
 }
 
 void processor_t::take_interrupt()
@@ -286,20 +333,19 @@ static bool validate_priv(reg_t priv)
   return priv == PRV_U || priv == PRV_S || priv == PRV_M;
 }
 
-static bool validate_arch(reg_t arch)
+static bool validate_arch(int max_xlen, reg_t arch)
 {
-#ifdef RISCV_ENABLE_64BIT
-  if (arch == UA_RV64) return true;
-#endif
+  if (max_xlen == 64 && arch == UA_RV64)
+    return true;
   return arch == UA_RV32;
 }
 
-static bool validate_vm(reg_t vm)
+static bool validate_vm(int max_xlen, reg_t vm)
 {
-  // TODO: VM_SV32 support
-#ifdef RISCV_ENABLE_64BIT
-  if (vm == VM_SV43) return true;
-#endif
+  if (max_xlen == 64 && vm == VM_SV39)
+    return true;
+  if (max_xlen == 32 && vm == VM_SV32)
+    return true;
   return vm == VM_MBARE;
 }
 
@@ -340,7 +386,7 @@ void processor_t::set_csr(int which, reg_t val)
         mask |= MSTATUS_XS;
       state.mstatus = (state.mstatus & ~mask) | (val & mask);
 
-      if (validate_vm(get_field(val, MSTATUS_VM)))
+      if (validate_vm(max_xlen, get_field(val, MSTATUS_VM)))
         state.mstatus = (state.mstatus & ~MSTATUS_VM) | (val & MSTATUS_VM);
       if (validate_priv(get_field(val, MSTATUS_MPRV)))
         state.mstatus = (state.mstatus & ~MSTATUS_MPRV) | (val & MSTATUS_MPRV);
@@ -352,26 +398,26 @@ void processor_t::set_csr(int which, reg_t val)
         state.mstatus = (state.mstatus & ~MSTATUS_PRV2) | (val & MSTATUS_PRV2);
       if (validate_priv(get_field(val, MSTATUS_PRV3)))
         state.mstatus = (state.mstatus & ~MSTATUS_PRV3) | (val & MSTATUS_PRV3);
-      xlen = 32;
 
       bool dirty = (state.mstatus & MSTATUS_FS) == MSTATUS_FS;
       dirty |= (state.mstatus & MSTATUS_XS) == MSTATUS_XS;
-#ifndef RISCV_ENABLE_64BIT
-      state.mstatus = set_field(state.mstatus, MSTATUS32_SD, dirty);
-#else
-      state.mstatus = set_field(state.mstatus, MSTATUS64_SD, dirty);
-
-      if (validate_arch(get_field(val, MSTATUS64_UA)))
-        state.mstatus = (state.mstatus & ~MSTATUS64_UA) | (val & MSTATUS64_UA);
-      if (validate_arch(get_field(val, MSTATUS64_SA)))
-        state.mstatus = (state.mstatus & ~MSTATUS64_SA) | (val & MSTATUS64_SA);
-      switch (get_field(state.mstatus, MSTATUS_PRV)) {
-        case PRV_U: if (get_field(state.mstatus, MSTATUS64_UA)) xlen = 64; break;
-        case PRV_S: if (get_field(state.mstatus, MSTATUS64_SA)) xlen = 64; break;
-        case PRV_M: xlen = 64; break;
-        default: abort();
+      xlen = 32;
+      if (max_xlen == 32) {
+        state.mstatus = set_field(state.mstatus, MSTATUS32_SD, dirty);
+      } else {
+        state.mstatus = set_field(state.mstatus, MSTATUS64_SD, dirty);
+
+        if (validate_arch(max_xlen, get_field(val, MSTATUS64_UA)))
+          state.mstatus = (state.mstatus & ~MSTATUS64_UA) | (val & MSTATUS64_UA);
+        if (validate_arch(max_xlen, get_field(val, MSTATUS64_SA)))
+          state.mstatus = (state.mstatus & ~MSTATUS64_SA) | (val & MSTATUS64_SA);
+        switch (get_field(state.mstatus, MSTATUS_PRV)) {
+          case PRV_U: if (get_field(state.mstatus, MSTATUS64_UA)) xlen = 64; break;
+          case PRV_S: if (get_field(state.mstatus, MSTATUS64_SA)) xlen = 64; break;
+          case PRV_M: xlen = 64; break;
+          default: abort();
+        }
       }
-#endif
       break;
     }
     case CSR_SSTATUS:
@@ -458,8 +504,8 @@ reg_t processor_t::get_csr(int which)
     case CSR_STVEC: return state.stvec;
     case CSR_STIMECMP: return state.stimecmp;
     case CSR_SCAUSE:
-      if (xlen == 32 && (state.scause >> 63) != 0)
-        return state.scause | ((reg_t)1 << 31);
+      if (max_xlen > xlen)
+        return state.scause | ((state.scause >> (max_xlen-1)) << (xlen-1));
       return state.scause;
     case CSR_SPTBR: return state.sptbr;
     case CSR_SASID: return 0;