Merge remote-tracking branch 'origin/priv-1.10' into HEAD

[riscv-isa-sim.git] / riscv / riscv.mk.in

diff --git a/riscv/riscv.mk.in b/riscv/riscv.mk.in
index 6f12b846a5f30935709e6a3d8a3f9aae1257c250..9cd8f4dbef2c08599371c3880e0498d260e19eaf 100644 (file)
--- a/riscv/riscv.mk.in
+++ b/riscv/riscv.mk.in
@@ -46,6 +46,8 @@ riscv_srcs = \
        devices.cc \
        rom.cc \
        rtc.cc \
+       clint.cc \
+       gdbserver.cc \
        debug_module.cc \
        remote_bitbang.cc \
        jtag_dtm.cc \
@@ -229,7 +231,7 @@ riscv_insn_list = \
        sc_d \
        sc_w \
        sd \
-       sfence_vm \
+       sfence_vma \
        sh \
        sll \
        slli \