more work towards RVC 1.8

[riscv-isa-sim.git] / riscv / riscv.mk.in

diff --git a/riscv/riscv.mk.in b/riscv/riscv.mk.in
index 882f34db7163643e98c41adff43da11aafbe6a21..239beb962b7dbeb7898a102bace1a631732db317 100644 (file)
--- a/riscv/riscv.mk.in
+++ b/riscv/riscv.mk.in
@@ -81,7 +81,6 @@ riscv_insn_list = \
        bltu \
        bne \
        c_add \
-       c_addi16sp \
        c_addi4spn \
        c_addi \
        c_addw \
@@ -104,7 +103,6 @@ riscv_insn_list = \
        c_jr \
        c_li \
        c_lui \
-       c_lbu \
        c_lw \
        c_lwsp \
        c_mv \