}
} jump_target;
+struct : public arg_t {
+ std::string to_string(insn_t insn) const {
+ return xpr_name[insn.rvc_rs1()];
+ }
+} rvc_rs1;
+
+struct : public arg_t {
+ std::string to_string(insn_t insn) const {
+ return xpr_name[insn.rvc_rds()];
+ }
+} rvc_rds;
+
+struct : public arg_t {
+ std::string to_string(insn_t insn) const {
+ return xpr_name[insn.rvc_rs1s()];
+ }
+} rvc_rs1s;
+
+struct : public arg_t {
+ std::string to_string(insn_t insn) const {
+ return std::to_string((int)insn.rvc_imm());
+ }
+} rvc_imm;
+
+struct : public arg_t {
+ std::string to_string(insn_t insn) const {
+ return std::to_string((int)insn.rvc_lwsp_imm());
+ }
+} rvc_lwsp_imm;
+
+struct : public arg_t {
+ std::string to_string(insn_t insn) const {
+ return std::to_string((int)(insn.rvc_imm() & 0x3f));
+ }
+} rvc_shamt;
+
+struct : public arg_t {
+ std::string to_string(insn_t insn) const {
+ std::stringstream s;
+ s << std::hex << "0x" << (uint32_t)insn.rvc_imm();
+ return s.str();
+ }
+} rvc_uimm;
+
+struct : public arg_t {
+ std::string to_string(insn_t insn) const {
+ return std::to_string((int)insn.rvc_lwsp_imm()) + '(' + xpr_name[2] + ')';
+ }
+} rvc_lwsp_address;
+
+struct : public arg_t {
+ std::string to_string(insn_t insn) const {
+ return std::to_string((int)insn.rvc_ldsp_imm()) + '(' + xpr_name[2] + ')';
+ }
+} rvc_ldsp_address;
+
+struct : public arg_t {
+ std::string to_string(insn_t insn) const {
+ return std::to_string((int)insn.rvc_lw_imm()) + '(' + xpr_name[insn.rvc_rs1s()] + ')';
+ }
+} rvc_lw_address;
+
+struct : public arg_t {
+ std::string to_string(insn_t insn) const {
+ return std::to_string((int)insn.rvc_ld_imm()) + '(' + xpr_name[insn.rvc_rs1s()] + ')';
+ }
+} rvc_ld_address;
+
+struct : public arg_t {
+ std::string to_string(insn_t insn) const {
+ std::stringstream s;
+ int32_t target = insn.rvc_b_imm();
+ char sign = target >= 0 ? '+' : '-';
+ s << "pc " << sign << ' ' << abs(target);
+ return s.str();
+ }
+} rvc_branch_target;
+
+struct : public arg_t {
+ std::string to_string(insn_t insn) const {
+ std::stringstream s;
+ int32_t target = insn.rvc_j_imm();
+ char sign = target >= 0 ? '+' : '-';
+ s << "pc " << sign << ' ' << abs(target);
+ return s.str();
+ }
+} rvc_jump_target;
+
std::string disassembler_t::disassemble(insn_t insn)
{
const disasm_insn_t* disasm_insn = lookup(insn);
const uint32_t match_rd_ra = 1UL << 7;
const uint32_t mask_rs1 = 0x1fUL << 15;
const uint32_t match_rs1_ra = 1UL << 15;
+ const uint32_t mask_rvc_rs1 = 0x1fUL << 2;
+ const uint32_t match_rvc_rs1_ra = 1UL << 2;
const uint32_t mask_rs2 = 0x1fUL << 20;
const uint32_t mask_imm = 0xfffUL << 20;
const uint32_t match_imm_1 = 1UL << 20;
DEFINE_FXTYPE(flt_d);
DEFINE_FXTYPE(fle_d);
+ add_insn(new disasm_insn_t("sbreak", match_c_li | 0x1000, 0xffff, {}));
+ DISASM_INSN("li", c_li, 0, {&xrd, &rvc_imm});
+ DISASM_INSN("lui", c_lui, 0, {&xrd, &rvc_uimm});
+ DISASM_INSN("addi", c_addi, 0, {&xrd, &xrd, &rvc_imm});
+ DISASM_INSN("addiw", c_addiw, 0, {&xrd, &xrd, &rvc_imm});
+ DISASM_INSN("slli", c_slli, 0, {&xrd, &rvc_shamt});
+ DISASM_INSN("addi", c_addi4, 0, {&xrd, &xrd, &rvc_lwsp_imm});
+ DISASM_INSN("mv", c_mv, 0, {&xrd, &rvc_rs1});
+ add_insn(new disasm_insn_t("ret", match_c_jalr | match_rvc_rs1_ra, mask_c_jalr | mask_rd | mask_rvc_rs1, {}));
+ DISASM_INSN("jr", c_jalr, mask_rd, {&xrd, &rvc_rs1});
+ DISASM_INSN("jalr", c_jalr, mask_rd, {&xrd, &rvc_rs1});
+ DISASM_INSN("add", c_add, 0, {&xrd, &xrd, &rvc_rs1});
+ DISASM_INSN("addw", c_addw, 0, {&xrd, &xrd, &rvc_rs1});
+ DISASM_INSN("lw", c_lwsp, 0, {&xrd, &rvc_lwsp_address});
+ DISASM_INSN("ld", c_ldsp, 0, {&xrd, &rvc_ldsp_address});
+ DISASM_INSN("sw", c_swsp, 0, {&xrd, &rvc_lwsp_address});
+ DISASM_INSN("sd", c_sdsp, 0, {&xrd, &rvc_ldsp_address});
+ DISASM_INSN("lw", c_lw, 0, {&rvc_rds, &rvc_lw_address});
+ DISASM_INSN("ld", c_ld, 0, {&rvc_rds, &rvc_ld_address});
+ DISASM_INSN("sw", c_sw, 0, {&rvc_rds, &rvc_lw_address});
+ DISASM_INSN("sd", c_sd, 0, {&rvc_rds, &rvc_ld_address});
+ DISASM_INSN("beqz", c_beqz, 0, {&rvc_rds, &rvc_branch_target});
+ DISASM_INSN("bnez", c_bnez, 0, {&rvc_rds, &rvc_branch_target});
+ DISASM_INSN("j", c_j, 0, {&rvc_jump_target});
+
// provide a default disassembly for all instructions as a fallback
#define DECLARE_INSN(code, match, mask) \
add_insn(new disasm_insn_t(#code " (args unknown)", match, mask, {}));