Remove hret instruction

[riscv-isa-sim.git] / spike_main / disasm.cc

diff --git a/spike_main/disasm.cc b/spike_main/disasm.cc
index bdbef9cef869759a563c7e72b1d41fcbb31d6977..69316812bfdd85235d69f86664229282a6e74888 100644 (file)
--- a/spike_main/disasm.cc
+++ b/spike_main/disasm.cc
@@ -418,7 +418,6 @@ disassembler_t::disassembler_t(int xlen)
   DEFINE_NOARG(ebreak);
   DEFINE_NOARG(uret);
   DEFINE_NOARG(sret);
-  DEFINE_NOARG(hret);
   DEFINE_NOARG(mret);
   DEFINE_NOARG(fence);
   DEFINE_NOARG(fence_i);