sptbr now a holds a PPN, not an address
authorAndrew Waterman <waterman@cs.berkeley.edu>
Fri, 19 Feb 2016 21:05:50 +0000 (13:05 -0800)
committerAndrew Waterman <waterman@cs.berkeley.edu>
Wed, 2 Mar 2016 20:15:25 +0000 (12:15 -0800)
riscv/mmu.cc
riscv/processor.cc

index 0ba378579b122db6407648d1f5e7ea4aaaff3712..b8fb02891fb82b2f30a159ca8412376c630999cc 100644 (file)
@@ -120,7 +120,7 @@ reg_t mmu_t::walk(reg_t addr, bool supervisor, access_type type)
   if (masked_msbs != 0 && masked_msbs != mask)
     return -1;
 
-  reg_t base = proc->get_state()->sptbr;
+  reg_t base = proc->get_state()->sptbr << PGSHIFT;
   int ptshift = (levels - 1) * ptidxbits;
   for (int i = 0; i < levels; i++, ptshift -= ptidxbits) {
     reg_t idx = (addr >> (PGSHIFT + ptshift)) & ((1 << ptidxbits) - 1);
index 55096c23809f6f56eb7bcef0008d78f0a72ce116..e948a47a9e28651090c9600df05ebec052214120 100644 (file)
@@ -372,7 +372,7 @@ void processor_t::set_csr(int which, reg_t val)
     }
     case CSR_SEPC: state.sepc = val; break;
     case CSR_STVEC: state.stvec = val >> 2 << 2; break;
-    case CSR_SPTBR: state.sptbr = val & -PGSIZE; break;
+    case CSR_SPTBR: state.sptbr = val; break;
     case CSR_SSCRATCH: state.sscratch = val; break;
     case CSR_SCAUSE: state.scause = val; break;
     case CSR_SBADADDR: state.sbadaddr = val; break;