For FMIN(sNaN, x) and FMIN(qNaN, qNaN), return canonical NaN

Resolves #76

diff --git a/riscv/insn_template.h b/riscv/insn_template.h
index 0dd0aa1942d34b7dfff6b08329c9518137aee9fe..07aa16ba05ab7dc24be90239ce720ccc1dc55fc4 100644 (file)
--- a/riscv/insn_template.h
+++ b/riscv/insn_template.h
@@ -4,5 +4,6 @@
 #include "mulhi.h"
 #include "softfloat.h"
 #include "internals.h"
+#include "specialize.h"
 #include "tracer.h"
 #include <assert.h>

diff --git a/riscv/insns/fmax_d.h b/riscv/insns/fmax_d.h
index f0bea9bb2dbf679729f359a7af99fd9ff0b5a11c..56c9c7a4e54a85c65e094d3146b8b490857aabbe 100644 (file)
--- a/riscv/insns/fmax_d.h
+++ b/riscv/insns/fmax_d.h
@@ -1,4 +1,6 @@
 require_extension('D');
 require_fp;
-WRITE_FRD(isNaNF64UI(FRS2) || f64_le_quiet(f64(FRS2), f64(FRS1)) ? FRS1 : FRS2);
+WRITE_FRD(f64_le_quiet(f64(FRS2), f64(FRS1)) || isNaNF64UI(FRS2) ? FRS1 : FRS2);
+if ((isNaNF64UI(FRS1) && isNaNF64UI(FRS2)) || softfloat_exceptionFlags)
+  WRITE_FRD(defaultNaNF64UI);
 set_fp_exceptions;

diff --git a/riscv/insns/fmax_s.h b/riscv/insns/fmax_s.h
index 33b2bc618f602525e1c5686996e01cdbdea6cba2..bf90356b6748c68b22dfb1f5eb4f2b2e3a64f464 100644 (file)
--- a/riscv/insns/fmax_s.h
+++ b/riscv/insns/fmax_s.h
@@ -1,4 +1,6 @@
 require_extension('F');
 require_fp;
-WRITE_FRD(isNaNF32UI(FRS2) || f32_le_quiet(f32(FRS2), f32(FRS1)) ? FRS1 : FRS2);
+WRITE_FRD(f32_le_quiet(f32(FRS2), f32(FRS1)) || isNaNF32UI(FRS2) ? FRS1 : FRS2);
+if ((isNaNF32UI(FRS1) && isNaNF32UI(FRS2)) || softfloat_exceptionFlags)
+  WRITE_FRD(defaultNaNF32UI);
 set_fp_exceptions;

diff --git a/riscv/insns/fmin_d.h b/riscv/insns/fmin_d.h
index e22b6eaf42dbaf367325d39eb06340a446c3b446..2a1755e30eb6db78cc1a43cb91e3796344545a82 100644 (file)
--- a/riscv/insns/fmin_d.h
+++ b/riscv/insns/fmin_d.h
@@ -1,4 +1,6 @@
 require_extension('D');
 require_fp;
-WRITE_FRD(isNaNF64UI(FRS2) || f64_lt_quiet(f64(FRS1), f64(FRS2)) ? FRS1 : FRS2);
+WRITE_FRD(f64_lt_quiet(f64(FRS1), f64(FRS2)) || isNaNF64UI(FRS2) ? FRS1 : FRS2);
+if ((isNaNF64UI(FRS1) && isNaNF64UI(FRS2)) || softfloat_exceptionFlags)
+  WRITE_FRD(defaultNaNF64UI);
 set_fp_exceptions;

diff --git a/riscv/insns/fmin_s.h b/riscv/insns/fmin_s.h
index 0ebb3a88e65bce3701d1607545c820afe695480d..831a7a255fed3fb8fd32083554a2255579221877 100644 (file)
--- a/riscv/insns/fmin_s.h
+++ b/riscv/insns/fmin_s.h
@@ -1,4 +1,6 @@
 require_extension('F');
 require_fp;
-WRITE_FRD(isNaNF32UI(FRS2) || f32_lt_quiet(f32(FRS1), f32(FRS2)) ? FRS1 : FRS2);
+WRITE_FRD(f32_lt_quiet(f32(FRS1), f32(FRS2)) || isNaNF32UI(FRS2) ? FRS1 : FRS2);
+if ((isNaNF32UI(FRS1) && isNaNF32UI(FRS2)) || softfloat_exceptionFlags)
+  WRITE_FRD(defaultNaNF32UI);
 set_fp_exceptions;