Softfloat fcvt.{w/h}.s now returns -MaxInt for -NaN

   Behavior now consistent with RISC-V user spec.

diff --git a/softfloat/f32_to_i32.c b/softfloat/f32_to_i32.c
index bbbaee04b326d801b8746bfff27f13c3c049ddab..98c67c9febd61ac9a254047f6765b622eb3e7780 100755 (executable)
--- a/softfloat/f32_to_i32.c
+++ b/softfloat/f32_to_i32.c
@@ -21,7 +21,6 @@ int_fast32_t f32_to_i32( float32_t a, int_fast8_t roundingMode, bool exact )
     sign = signF32UI( uiA );\r
     exp = expF32UI( uiA );\r
     sig = fracF32UI( uiA );\r
-    if ( ( exp == 0xFF ) && sig ) sign = 0;\r
     if ( exp ) sig |= 0x00800000;\r
     sig64 = (uint_fast64_t) sig<<32;\r
     shiftCount = 0xAF - exp;\r

diff --git a/softfloat/f32_to_i64.c b/softfloat/f32_to_i64.c
index c0b89811b9e74f0fe3c5f8cf9950d10ab1de3657..34f877f5525e7f4086d46e8662d114d3fc699d12 100755 (executable)
--- a/softfloat/f32_to_i64.c
+++ b/softfloat/f32_to_i64.c
@@ -25,7 +25,7 @@ int_fast64_t f32_to_i64( float32_t a, int_fast8_t roundingMode, bool exact )
     shiftCount = 0xBE - exp;\r
     if ( shiftCount < 0 ) {\r
         softfloat_raiseFlags( softfloat_flag_invalid );\r
-        if ( ! sign || ( ( exp == 0xFF ) && sig ) ) {\r
+        if ( ! sign ) {\r
             return INT64_C( 0x7FFFFFFFFFFFFFFF );\r
         }\r
         return - INT64_C( 0x7FFFFFFFFFFFFFFF ) - 1;\r