sim: define emulated CPU clock rate to be 1GHz

diff --git a/riscv/sim.h b/riscv/sim.h
index 5d165c9793532f334f117eb8f5c7b71fffcabd15..f655914e91a857d52f11268d812369127cc97c7e 100644 (file)
--- a/riscv/sim.h
+++ b/riscv/sim.h
@@ -48,6 +48,7 @@ private:
   void step(size_t n); // step through simulation
   static const size_t INTERLEAVE = 5000;
   static const size_t INSNS_PER_RTC_TICK = 100; // 10 MHz clock for 1 BIPS core
+  static const size_t CPU_HZ = 1000000000; // 1GHz CPU
   size_t current_step;
   size_t current_proc;
   bool debug;