Have ndmreset reset the processor

diff --git a/riscv/debug_module.cc b/riscv/debug_module.cc
index 533b959b9d3cf487b70910189f60482229185acc..5f66ebed0a1843d07ac038c83baf9a5172e37ba7 100644 (file)
--- a/riscv/debug_module.cc
+++ b/riscv/debug_module.cc
@@ -437,6 +437,9 @@ bool debug_module_t::dmi_write(unsigned address, uint32_t value)
               debug_rom_flags[dmcontrol.hartsel] |= (1 << DEBUG_ROM_FLAG_RESUME);
               resumeack[dmcontrol.hartsel] = false;
             }
+           if (dmcontrol.ndmreset) {
+             proc->reset();
+           }
           }
         }
         return true;