add BSD license
[riscv-isa-sim.git] / riscv / opcodes.h
2013-03-26 Andrew Watermanadd BSD license
2012-03-24 Andrew Watermannew supervisor mode
2012-03-19 Andrew Watermanupdate vector fences
2012-03-18 Yunsup Leeclean up vector exception instructions
2012-03-14 Yunsup Leeadd more instructions for vector exception handling
2012-03-14 Yunsup Leeadd vvcfg,vtcfg
2012-03-13 Yunsup Leeopcodes cleanup
2012-03-10 Yunsup Leeslight change to vector supervisor instructions
2012-03-03 Yunsup Leenew instructions to handle vector exceptions
2011-11-11 Andrew WatermanChanged MFTX to use rs1 for its source
2011-06-20 Andrew Watermantemporary undoing of renaming
2011-06-13 Andrew Waterman[sim] renamed to riscv-isa-run
2011-06-11 Andrew Waterman[sim, opcodes] made sim more decoupled from opcodes