1 #define SV_REG_CSR( type, regkey, elwidth, regidx, isvec, packed ) \
2 (regkey | (elwidth<<5) | (type<<7) | (regidx<<8) | (isvec<<14) | (packed<<15))
4 #define SV_PRED_CSR( type, regkey, zero, inv, regidx, active ) \
5 (regkey | (zero<<5) | (inv<<6) | (type<<7) | (regidx<<8) | (active<<14))
7 #define SET_SV_CSR( type, regkey, elwidth, regidx, isvec, packed ) \
8 li x1, SV_REG_CSR( type, regkey, elwidth, regidx, isvec, packed ); \
11 #define SET_SV_PRED_CSR( type, regkey, zero, inv, regidx, active ) \
12 li x1, SV_PRED_CSR( type, regkey, zero, inv, regidx, active ); \
15 #define CLR_SV_CSRS( ) csrrw x0, 0x4c0, 0
16 #define CLR_SV_PRED_CSRS( ) csrrw x0, 0x4c8, 0
18 #define SET_SV_MVL( val ) csrrwi x0, 0x4f2, val
19 #define SET_SV_VL( val ) csrrwi x0, 0x4f0, val
21 #define SV_LD_DATA( reg, from, offs ) \
25 #define TEST_SV_IMM( reg, imm ) \