+#include "riscv_test.h"
+#include "sv_test_macros.h"
+
+RVTEST_RV64UF
+
+
+# SV test: vector-vector fadd
+#
+# sets up x3 and x4 with data, sets VL to 2, and carries out
+# an "add 1 to x3". which actually means "add 1 to x3 *AND* add 1 to x4"
+
+# Test code region.
+RVTEST_CODE_BEGIN # Start of test code.
+
+ SV_FLD_DATA( f1, testdata , 0)
+ SV_FLD_DATA( f2, testdata+(1*8) , 0)
+ SV_FLD_DATA( f3, testdata+(2*8), 0)
+ SV_FLD_DATA( f4, testdata+(3*8), 0)
+ SV_FLD_DATA( f5, testdata+(4*8), 0)
+ SV_FLD_DATA( f6, testdata+(5*8), 0)
+ SV_FLD_DATA( f7, testdata+(6*8), 0)
+ SV_FLD_DATA( f8, testdata+(7*8), 0)
+ SV_FLD_DATA( f9, testdata+(8*8), 0)
+ SV_FLD_DATA( f10, testdata+(9*8), 0)
+ SV_FLD_DATA( f11, testdata+(10*8), 0)
+ SV_FLD_DATA( f12, testdata+(11*8), 0)
+
+ SET_SV_MVL(6)
+ SET_SV_2CSRS( SV_REG_CSR(0, 1, 0, 1, 1),
+ SV_REG_CSR(0, 7, 0, 7, 1) )
+ SET_SV_REMAP_CSR(7, 0, 0, 0, 0, 0);
+ SET_SV_SHAPE0_CSR(3, 2, 1, 0, SV_SHAPE_PERM_YXZ );
+ SET_SV_VL(6)
+
+ fadd.d f1, f1, f7;
+
+ CLR_SV_CSRS()
+ SET_SV_VL(1)
+ SET_SV_MVL(1)
+
+ TEST_SV_FD(0, f1, results, 0)
+ TEST_SV_FD(0, f2, results+1*8, 0)
+ TEST_SV_FD(0, f3, results+2*8, 0)
+ TEST_SV_FD(0, f4, results+3*8, 0)
+ TEST_SV_FD(0, f5, results+4*8, 0)
+ TEST_SV_FD(0, f6, results+5*8, 0)
+
+ RVTEST_PASS # Signal success.
+fail:
+ RVTEST_FAIL
+RVTEST_CODE_END # End of test code.
+
+# Input data section.
+# This section is optional, and this data is NOT saved in the output.
+.data
+ .align 3
+testdata:
+ .double 0.0
+ .double 1.0
+ .double 2.0
+ .double 3.0
+ .double 4.0
+ .double 5.0
+ .double 100.0
+ .double 200.0
+ .double 300.0
+ .double 400.0
+ .double 500.0
+ .double 600.0
+
+ .align 3
+results:
+ .double 100.0
+ .double 401.0
+ .double 202.0
+ .double 503.0
+ .double 304.0
+ .double 605.0
+
+# Output data section.
+RVTEST_DATA_BEGIN # Start of test output data region.
+ .align 3
+result:
+ .dword -1
+ .dword -1
+ .dword -1
+RVTEST_DATA_END # End of test output data region.
+