Verify that mtval/stval is written correctly on misaligned fetch
[riscv-tests.git] / isa / rv64si /
drwxr-xr-x   ..
-rw-r--r-- 344 Makefrag
-rw-r--r-- 3826 csr.S
-rw-r--r-- 2493 dirty.S
-rw-r--r-- 2312 ma_fetch.S
-rw-r--r-- 723 sbreak.S
-rw-r--r-- 872 scall.S
-rw-r--r-- 583 wfi.S