add Makefile for verilog compilation

[rv32.git] / .gitignore

diff --git a/.gitignore b/.gitignore
index ccb0f2e5057907a456a78665c072f4bf4b42ba38..055d8332e8eedc390cbc9c795c970e252f3820e9 100644 (file)
--- a/.gitignore
+++ b/.gitignore
@@ -77,3 +77,5 @@
 /output.bit
 /dump.vcd
 /rv32
+.*.sw?
+*.vgen