src/peripherals/rgbttl/Makefile

   1 ### Makefile for the cclass project
   2
   3 TOP_MODULE:=mkrgbttl_dummy
   4 TOP_FILE:=rgbttl_dummy.bsv
   5 TOP_DIR:=./
   6 WORKING_DIR := $(shell pwd)
   7
   8 BSVINCDIR:= .:%/Prelude:%/Libraries:%/Libraries/BlueNoC:./bsv_lib/
   9 BSVINCDIR:= $(BSVINCDIR):../../../src/uncore/axi4
  10 BSVINCDIR:= $(BSVINCDIR):../../../src/uncore/axi4lite
  11 BSVINCDIR:= $(BSVINCDIR):../../../src/peripherals/src/peripherals/gpio
  12 BSVINCDIR:= $(BSVINCDIR):../../../src/peripherals/rgbttl
  13 BSVINCDIR:= $(BSVINCDIR):../../../src/peripherals/i2c
  14 BSVINCDIR:= $(BSVINCDIR):../../../src/peripherals/mux
  15 BSVINCDIR:= $(BSVINCDIR):../../../src/peripherals/plic
  16 BSVINCDIR:= $(BSVINCDIR):../../../src/peripherals/pwm
  17 BSVINCDIR:= $(BSVINCDIR):../../../src/peripherals/qspi
  18 BSVINCDIR:= $(BSVINCDIR):../../../src/peripherals/spi
  19 BSVINCDIR:= $(BSVINCDIR):../../../src/peripherals/sdmmc
  20 BSVINCDIR:= $(BSVINCDIR):../../../src/peripherals/uart
  21
  22 default: gen_verilog
  23
  24 check-blue:
  25         @if test -z "$$BLUESPECDIR"; then echo "BLUESPECDIR variable not set"; exit 1; fi;
  26
  27 ###### Setting the variables for bluespec compile #$############################
  28 BSVCOMPILEOPTS:= -check-assert -suppress-warnings G0020 -keep-fires -opt-undetermined-vals -remove-false-rules -remove-empty-rules -remove-starved-rules
  29 BSVLINKOPTS:=-parallel-sim-link 8 -keep-fires
  30 VERILOGDIR:=./verilog/
  31 BSVBUILDDIR:=./bsv_build/
  32 BSVOUTDIR:=./bin
  33 ################################################################################
  34
  35 ########## BSIM COMPILE, LINK AND SIMULATE TARGETS ##########################
  36 .PHONY: check-restore
  37 check-restore:
  38         @if [ "$(define_macros)" != "$(old_define_macros)" ];   then    make clean ;    fi;
  39
  40 .PHONY: gen_verilog
  41 gen_verilog: check-restore check-blue
  42         @echo Compiling mkTbSoc in Verilog for simulations ...
  43         @mkdir -p $(BSVBUILDDIR);
  44         @mkdir -p $(VERILOGDIR);
  45         bsc -u -verilog -elab -vdir $(VERILOGDIR) -bdir $(BSVBUILDDIR) -info-dir $(BSVBUILDDIR) $(define_macros) -D verilog=True $(BSVCOMPILEOPTS) -verilog-filter ${BLUESPECDIR}/bin/basicinout -p $(BSVINCDIR) -g $(TOP_MODULE) $(TOP_DIR)/$(TOP_FILE) 2>&1 | tee bsv_compile.log
  46         @echo Compilation finished
  47
  48 #############################################################################
  49
  50 .PHONY: clean
  51 clean:
  52         rm -rf $(BSVBUILDDIR) *.log $(BSVOUTDIR) ./bbl*
  53         rm -rf verilog obj_dir bsv_src