1 from nmutil
.singlepipe
import ControlBase
2 from nmutil
.pipemodbase
import PipeModBaseChain
3 from soc
.fu
.branch
.main_stage
import BranchMainStage
4 from nmutil
.pipemodbase
import PipeModBase
5 from soc
.fu
.branch
.pipe_data
import BranchInputData
6 from nmigen
import Module
8 # gives a 1-clock delay to stop combinatorial link between in and out
9 class DummyBranchStage(PipeModBase
):
10 def __init__(self
, pspec
): super().__init
__(pspec
, "dummy")
11 def ispec(self
): return BranchInputData(self
.pspec
)
12 def ospec(self
): return BranchInputData(self
.pspec
)
14 def elaborate(self
, platform
):
16 m
.d
.comb
+= self
.o
.eq(self
.i
) # pass-through output
19 class BranchDummyStages(PipeModBaseChain
):
21 dummy
= DummyBranchStage(self
.pspec
)
25 class BranchStages(PipeModBaseChain
):
27 main
= BranchMainStage(self
.pspec
)
31 class BranchBasePipe(ControlBase
):
32 def __init__(self
, pspec
):
33 ControlBase
.__init
__(self
)
35 self
.pipe1
= BranchDummyStages(pspec
)
36 self
.pipe2
= BranchStages(pspec
)
37 self
._eqs
= self
.connect([self
.pipe1
, self
.pipe2
])
39 def elaborate(self
, platform
):
40 m
= ControlBase
.elaborate(self
, platform
)
41 m
.submodules
.pipe1
= self
.pipe1
42 m
.submodules
.pipe2
= self
.pipe2