add a new make target for setting coldboot firmware at 0xfff0_0000

[soc.git] / Makefile

diff --git a/Makefile b/Makefile
index f318ae315da4e8b0b21fe6d2ab1f44fdb9817c1a..736cd7b1ac2ace8e379e6a941d3e1f0adaf4c0de 100644 (file)
--- a/Makefile
+++ b/Makefile
@@ -69,6 +69,12 @@ microwatt_external_core_spi:
             --pc-reset 0x10000000 \
             external_core_top.v
 
+microwatt_external_core_bram:
+       python3 src/soc/simple/issuer_verilog.py --microwatt-compat \
+            --enable-mmu \
+            --pc-reset 0xFFF00000 \
+            external_core_top.v
+
 # build the litex libresoc SoC without 4k SRAMs
 ls180_verilog_build: ls180_verilog
        make -C soc/soc/litex/florent ls180