Allow the formal engine to perform a same-cycle result in the ALU
[soc.git] / src / experiment /
2019-05-22 Luke Kenneth Casso... ignore self-to-self read and write pending hazards
2019-05-22 Luke Kenneth Casso... read-after-write self-referring hazard
2019-05-22 Luke Kenneth Casso... allow loops to run instruction batches more than once
2019-05-22 Luke Kenneth Casso... WaW needs to stall
2019-05-22 Luke Kenneth Casso... wait for busy to go LOW before ending
2019-05-22 Luke Kenneth Casso... experiment with different completion times
2019-05-22 Luke Kenneth Casso... add in 2 more ALUs, now 4x4 scoreboard
2019-05-22 Luke Kenneth Casso... add mul and shift to simulation
2019-05-22 Luke Kenneth Casso... add extra regression test
2019-05-22 Luke Kenneth Casso... add div and shift (as experiment)
2019-05-22 Luke Kenneth Casso... random regression test shows an inter-dependency fail
2019-05-21 Luke Kenneth Casso... working on all cycles, RaW / WaR
2019-05-21 Luke Kenneth Casso... got working (sort-of) cscore6600
2019-05-20 Luke Kenneth Casso... nearly there with readable/writable on FU matrix
2019-05-20 Luke Kenneth Casso... attempting to work out FU-FU matrix connections
2019-05-20 Luke Kenneth Casso... include hazard line to swap rd/wr dependencies
2019-05-19 Luke Kenneth Casso... non-overlapping instructions ok
2019-05-19 Luke Kenneth Casso... sync ok on simple add
2019-05-19 Luke Kenneth Casso... add reg clearing and read-request release
2019-05-19 Luke Kenneth Casso... use register-based DepCell
2019-05-19 Luke Kenneth Casso... scoreboard 6600 experimentation
2019-05-18 Luke Kenneth Casso... connect up vectors direct
2019-05-18 Luke Kenneth Casso... Revert "whoops use global vector correctly"
2019-05-18 Luke Kenneth Casso... whoops use global vector correctly
2019-05-18 Luke Kenneth Casso... whoops use global vector correctly
2019-05-18 Luke Kenneth Casso... reduce syncs, get FU-FU and FU on same clock cycle
2019-05-18 Luke Kenneth Casso... now using readable/writable from fu-fu matrix, seems...
2019-05-18 Luke Kenneth Casso... use FU-FU matrix, seems to be working, still have to...
2019-05-16 Luke Kenneth Casso... reorg instr test issue
2019-05-16 Luke Kenneth Casso... bring in go_rd_i into 6600 scoreboard, on 1-clock delay
2019-05-16 Luke Kenneth Casso... remove & rd_l.q, is now in group picker
2019-05-16 Luke Kenneth Casso... add in go_rd
2019-05-16 Luke Kenneth Casso... experiment lock out of registers in read vector
2019-05-16 Luke Kenneth Casso... sync function unit src/dest
2019-05-16 Luke Kenneth Casso... getting there with instruction overlapping
2019-05-15 Luke Kenneth Casso... try random inputs
2019-05-15 Luke Kenneth Casso... write-after-read hazard working
2019-05-15 Luke Kenneth Casso... make global pending sync-delayed
2019-05-15 Luke Kenneth Casso... make fn unit invert readable, however qualify with...
2019-05-15 Luke Kenneth Casso... increase counter, experiment with longer completion...
2019-05-15 Luke Kenneth Casso... very weird: invert readable vector, cscore works
2019-05-14 Luke Kenneth Casso... experimenting with cscore, overlapping instructions
2019-05-14 Luke Kenneth Casso... inverted global write pend vector, on creation of reada...
2019-05-14 Luke Kenneth Casso... experimenting with score6600
2019-05-14 Luke Kenneth Casso... experimenting with cscore
2019-05-13 Luke Kenneth Casso... comb on intpick
2019-05-13 Luke Kenneth Casso... score6600 working without FunctionUnit (using dep matrices)
2019-05-13 Luke Kenneth Casso... sync on req_rel
2019-05-13 Luke Kenneth Casso... return to latch on src for oper
2019-05-13 Luke Kenneth Casso... go_rd/go_wr not arrays any more
2019-05-13 Luke Kenneth Casso... use operand latch, seems to work (6600 not cscore)
2019-05-13 Luke Kenneth Casso... add fn-unit src/dest latch registers
2019-05-13 Luke Kenneth Casso... make read/write-pending syncd
2019-05-13 Luke Kenneth Casso... use signals instead of arrays
2019-05-12 Luke Kenneth Casso... scoreboard 6600 semi-working (sync/comb issue)
2019-05-12 Luke Kenneth Casso... experimenting / debugging score6600
2019-05-12 Luke Kenneth Casso... split function units (and read/write pending vectors...
2019-05-12 Luke Kenneth Casso... split computation units to separate class
2019-05-12 Luke Kenneth Casso... add debug prints
2019-05-11 Luke Kenneth Casso... debugging score6600 matrix
2019-05-11 Luke Kenneth Casso... debug score6600
2019-05-11 Luke Kenneth Casso... try removing some syncs
2019-05-11 Luke Kenneth Casso... add in function units to score6600
2019-05-11 Luke Kenneth Casso... link function units back in to score6600
2019-05-11 Luke Kenneth Casso... use register latching in Computation Unit
2019-05-10 Luke Kenneth Casso... dependency cells enable on q not qn
2019-05-10 Luke Kenneth Casso... start connecting fu and reg dep matrices
2019-05-10 Luke Kenneth Casso... add variant using original (ish) 6600 scoreboard
2019-05-10 Luke Kenneth Casso... split out register decode from issue unit
2019-05-09 Luke Kenneth Casso... get scoreboard reasonably working
2019-05-09 Luke Kenneth Casso... add python simulation of alu
2019-05-08 Luke Kenneth Casso... move sync from intpick to fn unit readable
2019-05-08 Luke Kenneth Casso... make readable_i sync, stops infinite loop
2019-05-08 Luke Kenneth Casso... add some more experimental instructions
2019-05-08 Luke Kenneth Casso... add some more experimental instructions
2019-05-08 Luke Kenneth Casso... make SR Latch async again, make busy signal sync into...
2019-05-08 Luke Kenneth Casso... make write latch sync in Function Unit
2019-05-08 Luke Kenneth Casso... add decode out of src1 and src2 pending from FnUnit
2019-05-08 Luke Kenneth Casso... begin debugging, temporary sync on issueunit
2019-05-08 Luke Kenneth Casso... start on unit test
2019-05-08 Luke Kenneth Casso... connect up ALUs
2019-05-08 Luke Kenneth Casso... add computational unit
2019-05-08 Luke Kenneth Casso... add register file connection
2019-05-08 Luke Kenneth Casso... connect to integer global pending vectors
2019-05-08 Luke Kenneth Casso... add intpick connections
2019-05-08 Luke Kenneth Casso... rename rel_req to req_rel
2019-05-08 Luke Kenneth Casso... connect issue unit to function units
2019-05-08 Luke Kenneth Casso... start wiring up issue unit
2019-05-08 Luke Kenneth Casso... add int fu-reg dep matrix
2019-05-08 Luke Kenneth Casso... add names to read/write ports, add priority picker...
2019-05-08 Luke Kenneth Casso... begin connecting units together
2019-05-07 Luke Kenneth Casso... add nmigen alu_hier to experiment