absyn.py

   1 from lib2to3.pytree import Node, Leaf
   2 from lib2to3.pgen2 import token
   3 from lib2to3.pygram import python_symbols as syms
   4
   5 preamble = """# this file has been generated by sv2nmigen
   6
   7 from nmigen import Signal, Module, Const, Cat, Elaboratable
   8
   9
  10
  11 """
  12
  13
  14 def port_decl_do_not_use(comment, dt, name):
  15     if dt is None or dt.dims is None:
  16         width = ''  # width: 1
  17     else:
  18         width = dt.dims
  19         # XXX TODO, better checking, should be using data structure... *sigh*
  20         width = width[1:-1]  # strip brackets
  21         width = width.split(':')
  22         assert width[0] == '0'
  23         width = width[1]
  24     return 'self.%s = Signal(%s) # %s' % (name, width, comment)
  25
  26
  27 indent_debug = 0
  28
  29
  30 class PortDecl:
  31     def __init__(self, comment, dt, name):
  32         self.comment = comment
  33         self.dt = dt
  34         self.name = name
  35
  36     def initNode(self):
  37         return port_decl_do_not_use(self.comment, self.dt, self.name)
  38
  39
  40 class Assignment:
  41     def __init__(self, left, op, right):
  42         self.left = left
  43         self.op = op
  44         self.right = right
  45
  46
  47 class Absyn:
  48     def __init__(self, outputfn):
  49         self.outputfn = outputfn
  50         self.outputfile = None
  51         self.assign = []
  52         self.ports = []
  53         self.wires = []
  54
  55     def open(self):
  56         if(self.outputfile is None):
  57             self.outputfile = open(self.outputfn, "w")
  58             self.outputfile.write(preamble)
  59
  60     def printpy(self, p):
  61         self.open()
  62         self.outputfile.write(str(p)+"\n")
  63
  64     def assign(self, p):
  65         p = list(p)
  66         if(p[1] == "assign"):
  67             self.printpy(p[4])
  68             # m.d.comb += [l.eq(r)]
  69
  70     def indent(self, count):
  71         if(indent_debug):
  72             return Leaf(token.INDENT, '>>> '*count)
  73         else:
  74             return Leaf(token.INDENT, ' '*4*count)
  75
  76     def dedent(self, count):
  77         return Leaf(token.DEDENT, '')
  78
  79     def nl(self):
  80         return Leaf(token.NEWLINE, '\n')
  81
  82     def port_decl(self, comment, dt, name):
  83         port = PortDecl(comment, dt, name)
  84         self.ports += [port]
  85         return port
  86
  87     def isPort(self, name):
  88         for p in self.ports:
  89             if(str(p.name) == str(name)):
  90                 return True
  91         return False
  92
  93     def initFunc(self, ports, params):
  94         params = [Leaf(token.LPAR, '('), Leaf(
  95             token.NAME, "self")] + [Leaf(token.RPAR, ')')]
  96         # TODO handle sv params
  97         fn = [Leaf(token.NAME, 'def'),
  98               Leaf(token.NAME, '__init__', prefix=' '),
  99               Node(syms.parameters, params),
 100               Leaf(token.COLON, ':'),
 101               self.nl()
 102               ]
 103         fndef = Node(syms.funcdef, fn)
 104         stmts = Node(syms.stmt, [fndef])
 105         for port in ports:
 106             stmts.children.append(self.indent(2))
 107             stmts.children.append(port.initNode())
 108             stmts.children.append(self.nl())
 109         return stmts
 110
 111     def elaborateFunc(self):
 112         params = [Leaf(token.LPAR, '('), Leaf(
 113             token.NAME, "self, platform=None"), Leaf(token.RPAR, ')')]
 114         fn = [Leaf(token.NAME, 'def'),
 115               Leaf(token.NAME, 'elaborate', prefix=' '),
 116               Node(syms.parameters, params),
 117               Leaf(token.COLON, ':'),
 118               self.nl()
 119               ]
 120         fndef = Node(syms.funcdef, fn)
 121         stmts = Node(syms.stmt, [fndef])
 122         stmts.children.append(self.indent(2))
 123         stmts.children.append(Leaf(token.STRING, "m = Module()"))
 124         stmts.children.append(self.nl())
 125
 126         for w in self.wires:
 127             wirename = w[0]
 128             hasdims = (len(w) >= 4)
 129             stmts.children.append(self.indent(2))
 130             stmts.children.append(Leaf(token.STRING, wirename))
 131             stmts.children.append(Leaf(token.STRING, " = Signal("))
 132             if(hasdims):
 133                 stmts.children.append(Leaf(token.STRING, str(w[3])))
 134             stmts.children.append(Leaf(token.STRING, ")"))
 135             stmts.children.append(self.nl())
 136
 137         for a in self.assign:
 138             stmts.children.append(self.indent(2))
 139             # m.d.sync += self.left.eq(right)
 140             stmts.children.append(Leaf(token.STRING, "m.d.comb += "))
 141             if(self.isPort(a.left)):
 142                 stmts.children.append(Leaf(token.STRING, "self."))
 143             stmts.children.append(Leaf(token.STRING, a.left))
 144             stmts.children.append(Leaf(token.STRING, ".eq("))
 145             if(self.isPort(a.right)):
 146                 stmts.children.append(Leaf(token.STRING, "self."))
 147             stmts.children.append(Leaf(token.STRING, a.right))
 148             stmts.children.append(Leaf(token.STRING, ")"))
 149             stmts.children.append(self.nl())
 150
 151         # for a in self.assign:
 152         #
 153             #
 154             #ports = a[8]
 155         #
 156
 157         stmts.children.append(self.indent(2))
 158         stmts.children.append(Leaf(token.STRING, "return m"))
 159         stmts.children.append(self.nl())
 160         return stmts
 161
 162     def module_1(self, p):
 163         params = p[7]
 164         ports = p[8]
 165         clsname = [Leaf(token.NAME, 'class'),
 166                    Leaf(token.NAME, p[4], prefix=' '),
 167                    Leaf(token.LPAR, '('),
 168                    Leaf(token.NAME, 'Elaboratable'),
 169                    Leaf(token.LPAR, ')'),
 170                    Leaf(token.COLON, ':'),
 171                    self.nl(),
 172                    ]
 173
 174         suite = Node(syms.suite, [Leaf(token.NEWLINE, '\n'),
 175                                   self.indent(1),
 176                                   self.initFunc(ports, params),
 177                                   self.indent(1),
 178                                   self.elaborateFunc()
 179
 180                                   ])
 181         clsdecl = Node(syms.classdef, clsname + [suite])
 182         clsdecl = Node(syms.compound_stmt, [clsdecl])
 183
 184         self.printpy(str(clsdecl))
 185         return clsdecl
 186
 187     def module_item_2(self, signaltype, dims, mlist):
 188         if(signaltype == "wire"):
 189             for m in mlist:
 190                 if(dims):
 191                     self.wires.append(m+dims)
 192                 else:
 193                     self.wires.append(m)
 194
 195     def appendComments(self, data):
 196         self.open()
 197         self.outputfile.write(data)
 198         #lines = data.split("\n")
 199         # for line in lines:
 200         #    self.printpy("#"+line)
 201
 202     # combinatorical assign
 203     def cont_assign_1(self, p):
 204         # print("#ASSIGN:BROKEN"+str(list(p)))
 205         self.assign += [Assignment(p[1], p[2], p[3])]