Properly connect reset and cs signals

[gram.git] / libgram / src / dfii.c

diff --git a/libgram/src/dfii.c b/libgram/src/dfii.c
index 58519bd8ff77f0f7edb030e9bfbfccdd7b6eb226..17e18dada9b4069698df0d060262fb659423c554 100644 (file)
--- a/libgram/src/dfii.c
+++ b/libgram/src/dfii.c
@@ -15,7 +15,7 @@ static void dfii_setcontrol(const struct gramCtx *ctx, uint8_t val) {
 
 void dfii_setsw(const struct gramCtx *ctx, bool software_control) {
        if (software_control) {
-               dfii_setcontrol(ctx, DFII_CONTROL_CKE|DFII_CONTROL_ODT);
+               dfii_setcontrol(ctx, DFII_CONTROL_CKE|DFII_CONTROL_ODT|DFII_CONTROL_RESET|DFII_COMMAND_CS);
        } else {
                dfii_setcontrol(ctx, DFII_CONTROL_SEL|DFII_CONTROL_RESET);
        }
@@ -59,13 +59,13 @@ void dfii_initseq(const struct gramCtx *ctx, const struct gramProfile *profile)
        /* Release reset */
        dfii_set_p0_address(ctx, 0x0);
        dfii_set_p0_baddress(ctx, 0);
-       dfii_setcontrol(ctx, DFII_CONTROL_ODT);
+       dfii_setcontrol(ctx, DFII_CONTROL_ODT|DFII_CONTROL_RESET);
        cdelay(50000);
 
        /* Bring CKE high */
        dfii_set_p0_address(ctx, 0x0);
        dfii_set_p0_baddress(ctx, 0);
-       dfii_setcontrol(ctx, DFII_CONTROL_CKE|DFII_CONTROL_ODT);
+       dfii_setcontrol(ctx, DFII_CONTROL_CKE|DFII_CONTROL_ODT|DFII_CONTROL_RESET);
        cdelay(10000);
 
        /* Load Mode Register 2, CWL=5 */