riscv/execute.h

   1 /* Automatically generated by parse-opcodes */
   2 switch((insn.bits >> 0x0) & 0x7f)
   3 {
   4   case 0x0:
   5   {
   6     #include "insns/c_addi.h"
   7     break;
   8   }
   9   case 0x1:
  10   {
  11     #include "insns/c_li.h"
  12     break;
  13   }
  14   case 0x2:
  15   {
  16     switch((insn.bits >> 0x7) & 0x7)
  17     {
  18       case 0x0:
  19       {
  20         if((insn.bits & 0x801f) == 0x2)
  21         {
  22           #include "insns/c_move.h"
  23           break;
  24         }
  25         if((insn.bits & 0x801f) == 0x8002)
  26         {
  27           #include "insns/c_j.h"
  28           break;
  29         }
  30         throw trap_illegal_instruction;
  31       }
  32       case 0x1:
  33       {
  34         if((insn.bits & 0x801f) == 0x2)
  35         {
  36           #include "insns/c_move.h"
  37           break;
  38         }
  39         if((insn.bits & 0x801f) == 0x8002)
  40         {
  41           #include "insns/c_j.h"
  42           break;
  43         }
  44         throw trap_illegal_instruction;
  45       }
  46       case 0x2:
  47       {
  48         if((insn.bits & 0x801f) == 0x2)
  49         {
  50           #include "insns/c_move.h"
  51           break;
  52         }
  53         if((insn.bits & 0x801f) == 0x8002)
  54         {
  55           #include "insns/c_j.h"
  56           break;
  57         }
  58         throw trap_illegal_instruction;
  59       }
  60       case 0x3:
  61       {
  62         if((insn.bits & 0x801f) == 0x2)
  63         {
  64           #include "insns/c_move.h"
  65           break;
  66         }
  67         if((insn.bits & 0x801f) == 0x8002)
  68         {
  69           #include "insns/c_j.h"
  70           break;
  71         }
  72         throw trap_illegal_instruction;
  73       }
  74       case 0x4:
  75       {
  76         if((insn.bits & 0x801f) == 0x2)
  77         {
  78           #include "insns/c_move.h"
  79           break;
  80         }
  81         if((insn.bits & 0x801f) == 0x8002)
  82         {
  83           #include "insns/c_j.h"
  84           break;
  85         }
  86         throw trap_illegal_instruction;
  87       }
  88       case 0x5:
  89       {
  90         if((insn.bits & 0x801f) == 0x2)
  91         {
  92           #include "insns/c_move.h"
  93           break;
  94         }
  95         if((insn.bits & 0x801f) == 0x8002)
  96         {
  97           #include "insns/c_j.h"
  98           break;
  99         }
 100         throw trap_illegal_instruction;
 101       }
 102       case 0x6:
 103       {
 104         if((insn.bits & 0x801f) == 0x2)
 105         {
 106           #include "insns/c_move.h"
 107           break;
 108         }
 109         if((insn.bits & 0x801f) == 0x8002)
 110         {
 111           #include "insns/c_j.h"
 112           break;
 113         }
 114         throw trap_illegal_instruction;
 115       }
 116       case 0x7:
 117       {
 118         if((insn.bits & 0x801f) == 0x2)
 119         {
 120           #include "insns/c_move.h"
 121           break;
 122         }
 123         if((insn.bits & 0x801f) == 0x8002)
 124         {
 125           #include "insns/c_j.h"
 126           break;
 127         }
 128         throw trap_illegal_instruction;
 129       }
 130       default:
 131       {
 132         throw trap_illegal_instruction;
 133       }
 134     }
 135     break;
 136   }
 137   case 0x3:
 138   {
 139     switch((insn.bits >> 0x7) & 0x7)
 140     {
 141       case 0x0:
 142       {
 143         #include "insns/lb.h"
 144         break;
 145       }
 146       case 0x1:
 147       {
 148         #include "insns/lh.h"
 149         break;
 150       }
 151       case 0x2:
 152       {
 153         #include "insns/lw.h"
 154         break;
 155       }
 156       case 0x3:
 157       {
 158         #include "insns/ld.h"
 159         break;
 160       }
 161       case 0x4:
 162       {
 163         #include "insns/lbu.h"
 164         break;
 165       }
 166       case 0x5:
 167       {
 168         #include "insns/lhu.h"
 169         break;
 170       }
 171       case 0x6:
 172       {
 173         #include "insns/lwu.h"
 174         break;
 175       }
 176       default:
 177       {
 178         throw trap_illegal_instruction;
 179       }
 180     }
 181     break;
 182   }
 183   case 0x7:
 184   {
 185     switch((insn.bits >> 0x7) & 0x7)
 186     {
 187       case 0x2:
 188       {
 189         #include "insns/flw.h"
 190         break;
 191       }
 192       case 0x3:
 193       {
 194         #include "insns/fld.h"
 195         break;
 196       }
 197       default:
 198       {
 199         throw trap_illegal_instruction;
 200       }
 201     }
 202     break;
 203   }
 204   case 0xb:
 205   {
 206     switch((insn.bits >> 0x7) & 0x7)
 207     {
 208       case 0x0:
 209       {
 210         if((insn.bits & 0x1ffff) == 0x280b)
 211         {
 212           #include "insns/sbseg_v.h"
 213           break;
 214         }
 215         if((insn.bits & 0x1ffff) == 0x100b)
 216         {
 217           #include "insns/lbst_v.h"
 218           break;
 219         }
 220         if((insn.bits & 0x1ffff) == 0x180b)
 221         {
 222           #include "insns/sbst_v.h"
 223           break;
 224         }
 225         if((insn.bits & 0x3fffff) == 0xb)
 226         {
 227           #include "insns/lb_v.h"
 228           break;
 229         }
 230         if((insn.bits & 0x1ffff) == 0x200b)
 231         {
 232           #include "insns/lbseg_v.h"
 233           break;
 234         }
 235         if((insn.bits & 0x3fffff) == 0x1000b)
 236         {
 237           #include "insns/mov_vv.h"
 238           break;
 239         }
 240         if((insn.bits & 0x3fffff) == 0x1800b)
 241         {
 242           #include "insns/fmov_vv.h"
 243           break;
 244         }
 245         if((insn.bits & 0x3fffff) == 0x80b)
 246         {
 247           #include "insns/sb_v.h"
 248           break;
 249         }
 250         throw trap_illegal_instruction;
 251       }
 252       case 0x1:
 253       {
 254         if((insn.bits & 0x1ffff) == 0x208b)
 255         {
 256           #include "insns/lhseg_v.h"
 257           break;
 258         }
 259         if((insn.bits & 0x1ffff) == 0x108b)
 260         {
 261           #include "insns/lhst_v.h"
 262           break;
 263         }
 264         if((insn.bits & 0x3fffff) == 0x1008b)
 265         {
 266           #include "insns/mov_sv.h"
 267           break;
 268         }
 269         if((insn.bits & 0x3fffff) == 0x1808b)
 270         {
 271           #include "insns/fmov_sv.h"
 272           break;
 273         }
 274         if((insn.bits & 0x3fffff) == 0x8b)
 275         {
 276           #include "insns/lh_v.h"
 277           break;
 278         }
 279         if((insn.bits & 0x3fffff) == 0x88b)
 280         {
 281           #include "insns/sh_v.h"
 282           break;
 283         }
 284         if((insn.bits & 0x1ffff) == 0x288b)
 285         {
 286           #include "insns/shseg_v.h"
 287           break;
 288         }
 289         if((insn.bits & 0x1ffff) == 0x188b)
 290         {
 291           #include "insns/shst_v.h"
 292           break;
 293         }
 294         throw trap_illegal_instruction;
 295       }
 296       case 0x2:
 297       {
 298         if((insn.bits & 0x3fffff) == 0x10b)
 299         {
 300           #include "insns/lw_v.h"
 301           break;
 302         }
 303         if((insn.bits & 0x1ffff) == 0x1810b)
 304         {
 305           #include "insns/fmov_su.h"
 306           break;
 307         }
 308         if((insn.bits & 0x1ffff) == 0x290b)
 309         {
 310           #include "insns/swseg_v.h"
 311           break;
 312         }
 313         if((insn.bits & 0x1ffff) == 0x1010b)
 314         {
 315           #include "insns/mov_su.h"
 316           break;
 317         }
 318         if((insn.bits & 0x1ffff) == 0x1d0b)
 319         {
 320           #include "insns/fswst_v.h"
 321           break;
 322         }
 323         if((insn.bits & 0x1ffff) == 0x190b)
 324         {
 325           #include "insns/swst_v.h"
 326           break;
 327         }
 328         if((insn.bits & 0x3fffff) == 0xd0b)
 329         {
 330           #include "insns/fsw_v.h"
 331           break;
 332         }
 333         if((insn.bits & 0x1ffff) == 0x250b)
 334         {
 335           #include "insns/flwseg_v.h"
 336           break;
 337         }
 338         if((insn.bits & 0x3fffff) == 0x50b)
 339         {
 340           #include "insns/flw_v.h"
 341           break;
 342         }
 343         if((insn.bits & 0x3fffff) == 0x90b)
 344         {
 345           #include "insns/sw_v.h"
 346           break;
 347         }
 348         if((insn.bits & 0x1ffff) == 0x150b)
 349         {
 350           #include "insns/flwst_v.h"
 351           break;
 352         }
 353         if((insn.bits & 0x1ffff) == 0x210b)
 354         {
 355           #include "insns/lwseg_v.h"
 356           break;
 357         }
 358         if((insn.bits & 0x1ffff) == 0x2d0b)
 359         {
 360           #include "insns/fswseg_v.h"
 361           break;
 362         }
 363         if((insn.bits & 0x1ffff) == 0x110b)
 364         {
 365           #include "insns/lwst_v.h"
 366           break;
 367         }
 368         throw trap_illegal_instruction;
 369       }
 370       case 0x3:
 371       {
 372         if((insn.bits & 0x1ffff) == 0x218b)
 373         {
 374           #include "insns/ldseg_v.h"
 375           break;
 376         }
 377         if((insn.bits & 0x3fffff) == 0x58b)
 378         {
 379           #include "insns/fld_v.h"
 380           break;
 381         }
 382         if((insn.bits & 0x3fffff) == 0x18b)
 383         {
 384           #include "insns/ld_v.h"
 385           break;
 386         }
 387         if((insn.bits & 0x3fffff) == 0xd8b)
 388         {
 389           #include "insns/fsd_v.h"
 390           break;
 391         }
 392         if((insn.bits & 0x1ffff) == 0x2d8b)
 393         {
 394           #include "insns/fsdseg_v.h"
 395           break;
 396         }
 397         if((insn.bits & 0x1ffff) == 0x1d8b)
 398         {
 399           #include "insns/fsdst_v.h"
 400           break;
 401         }
 402         if((insn.bits & 0x1ffff) == 0x118b)
 403         {
 404           #include "insns/ldst_v.h"
 405           break;
 406         }
 407         if((insn.bits & 0x1ffff) == 0x258b)
 408         {
 409           #include "insns/fldseg_v.h"
 410           break;
 411         }
 412         if((insn.bits & 0x1ffff) == 0x1018b)
 413         {
 414           #include "insns/mov_us.h"
 415           break;
 416         }
 417         if((insn.bits & 0x1ffff) == 0x158b)
 418         {
 419           #include "insns/fldst_v.h"
 420           break;
 421         }
 422         if((insn.bits & 0x1ffff) == 0x298b)
 423         {
 424           #include "insns/sdseg_v.h"
 425           break;
 426         }
 427         if((insn.bits & 0x1ffff) == 0x1818b)
 428         {
 429           #include "insns/fmov_us.h"
 430           break;
 431         }
 432         if((insn.bits & 0x3fffff) == 0x98b)
 433         {
 434           #include "insns/sd_v.h"
 435           break;
 436         }
 437         if((insn.bits & 0x1ffff) == 0x198b)
 438         {
 439           #include "insns/sdst_v.h"
 440           break;
 441         }
 442         throw trap_illegal_instruction;
 443       }
 444       case 0x4:
 445       {
 446         if((insn.bits & 0x3fffff) == 0x20b)
 447         {
 448           #include "insns/lbu_v.h"
 449           break;
 450         }
 451         if((insn.bits & 0x1ffff) == 0x220b)
 452         {
 453           #include "insns/lbuseg_v.h"
 454           break;
 455         }
 456         if((insn.bits & 0x1ffff) == 0x120b)
 457         {
 458           #include "insns/lbust_v.h"
 459           break;
 460         }
 461         throw trap_illegal_instruction;
 462       }
 463       case 0x5:
 464       {
 465         if((insn.bits & 0x1ffff) == 0x128b)
 466         {
 467           #include "insns/lhust_v.h"
 468           break;
 469         }
 470         if((insn.bits & 0x3fffff) == 0x28b)
 471         {
 472           #include "insns/lhu_v.h"
 473           break;
 474         }
 475         if((insn.bits & 0x1ffff) == 0x228b)
 476         {
 477           #include "insns/lhuseg_v.h"
 478           break;
 479         }
 480         throw trap_illegal_instruction;
 481       }
 482       case 0x6:
 483       {
 484         if((insn.bits & 0x1ffff) == 0x230b)
 485         {
 486           #include "insns/lwuseg_v.h"
 487           break;
 488         }
 489         if((insn.bits & 0x3fffff) == 0x30b)
 490         {
 491           #include "insns/lwu_v.h"
 492           break;
 493         }
 494         if((insn.bits & 0x1ffff) == 0x130b)
 495         {
 496           #include "insns/lwust_v.h"
 497           break;
 498         }
 499         throw trap_illegal_instruction;
 500       }
 501       default:
 502       {
 503         throw trap_illegal_instruction;
 504       }
 505     }
 506     break;
 507   }
 508   case 0xf:
 509   {
 510     switch((insn.bits >> 0x7) & 0x7)
 511     {
 512       case 0x0:
 513       {
 514         if((insn.bits & 0xfff) == 0x80f)
 515         {
 516           #include "insns/sbsegst_v.h"
 517           break;
 518         }
 519         if((insn.bits & 0xfff) == 0xf)
 520         {
 521           #include "insns/lbsegst_v.h"
 522           break;
 523         }
 524         throw trap_illegal_instruction;
 525       }
 526       case 0x1:
 527       {
 528         if((insn.bits & 0xfff) == 0x88f)
 529         {
 530           #include "insns/shsegst_v.h"
 531           break;
 532         }
 533         if((insn.bits & 0xfff) == 0x8f)
 534         {
 535           #include "insns/lhsegst_v.h"
 536           break;
 537         }
 538         throw trap_illegal_instruction;
 539       }
 540       case 0x2:
 541       {
 542         if((insn.bits & 0xfff) == 0xd0f)
 543         {
 544           #include "insns/fswsegst_v.h"
 545           break;
 546         }
 547         if((insn.bits & 0xfff) == 0x50f)
 548         {
 549           #include "insns/flwsegst_v.h"
 550           break;
 551         }
 552         if((insn.bits & 0xfff) == 0x10f)
 553         {
 554           #include "insns/lwsegst_v.h"
 555           break;
 556         }
 557         if((insn.bits & 0xfff) == 0x90f)
 558         {
 559           #include "insns/swsegst_v.h"
 560           break;
 561         }
 562         throw trap_illegal_instruction;
 563       }
 564       case 0x3:
 565       {
 566         if((insn.bits & 0xfff) == 0x18f)
 567         {
 568           #include "insns/ldsegst_v.h"
 569           break;
 570         }
 571         if((insn.bits & 0xfff) == 0x98f)
 572         {
 573           #include "insns/sdsegst_v.h"
 574           break;
 575         }
 576         if((insn.bits & 0xfff) == 0x58f)
 577         {
 578           #include "insns/fldsegst_v.h"
 579           break;
 580         }
 581         if((insn.bits & 0xfff) == 0xd8f)
 582         {
 583           #include "insns/fsdsegst_v.h"
 584           break;
 585         }
 586         throw trap_illegal_instruction;
 587       }
 588       case 0x4:
 589       {
 590         if((insn.bits & 0xfff) == 0x20f)
 591         {
 592           #include "insns/lbusegst_v.h"
 593           break;
 594         }
 595         throw trap_illegal_instruction;
 596       }
 597       case 0x5:
 598       {
 599         if((insn.bits & 0xfff) == 0x28f)
 600         {
 601           #include "insns/lhusegst_v.h"
 602           break;
 603         }
 604         throw trap_illegal_instruction;
 605       }
 606       case 0x6:
 607       {
 608         if((insn.bits & 0xfff) == 0x30f)
 609         {
 610           #include "insns/lwusegst_v.h"
 611           break;
 612         }
 613         throw trap_illegal_instruction;
 614       }
 615       default:
 616       {
 617         throw trap_illegal_instruction;
 618       }
 619     }
 620     break;
 621   }
 622   case 0x13:
 623   {
 624     switch((insn.bits >> 0x7) & 0x7)
 625     {
 626       case 0x0:
 627       {
 628         #include "insns/addi.h"
 629         break;
 630       }
 631       case 0x1:
 632       {
 633         if((insn.bits & 0x3f03ff) == 0x93)
 634         {
 635           #include "insns/slli.h"
 636           break;
 637         }
 638         throw trap_illegal_instruction;
 639       }
 640       case 0x2:
 641       {
 642         #include "insns/slti.h"
 643         break;
 644       }
 645       case 0x3:
 646       {
 647         #include "insns/sltiu.h"
 648         break;
 649       }
 650       case 0x4:
 651       {
 652         #include "insns/xori.h"
 653         break;
 654       }
 655       case 0x5:
 656       {
 657         if((insn.bits & 0x3f03ff) == 0x293)
 658         {
 659           #include "insns/srli.h"
 660           break;
 661         }
 662         if((insn.bits & 0x3f03ff) == 0x10293)
 663         {
 664           #include "insns/srai.h"
 665           break;
 666         }
 667         throw trap_illegal_instruction;
 668       }
 669       case 0x6:
 670       {
 671         #include "insns/ori.h"
 672         break;
 673       }
 674       case 0x7:
 675       {
 676         #include "insns/andi.h"
 677         break;
 678       }
 679       default:
 680       {
 681         throw trap_illegal_instruction;
 682       }
 683     }
 684     break;
 685   }
 686   case 0x1b:
 687   {
 688     switch((insn.bits >> 0x7) & 0x7)
 689     {
 690       case 0x0:
 691       {
 692         #include "insns/addiw.h"
 693         break;
 694       }
 695       case 0x1:
 696       {
 697         if((insn.bits & 0x3f83ff) == 0x9b)
 698         {
 699           #include "insns/slliw.h"
 700           break;
 701         }
 702         throw trap_illegal_instruction;
 703       }
 704       case 0x5:
 705       {
 706         if((insn.bits & 0x3f83ff) == 0x29b)
 707         {
 708           #include "insns/srliw.h"
 709           break;
 710         }
 711         if((insn.bits & 0x3f83ff) == 0x1029b)
 712         {
 713           #include "insns/sraiw.h"
 714           break;
 715         }
 716         throw trap_illegal_instruction;
 717       }
 718       default:
 719       {
 720         throw trap_illegal_instruction;
 721       }
 722     }
 723     break;
 724   }
 725   case 0x20:
 726   {
 727     #include "insns/c_addi.h"
 728     break;
 729   }
 730   case 0x21:
 731   {
 732     #include "insns/c_li.h"
 733     break;
 734   }
 735   case 0x22:
 736   {
 737     switch((insn.bits >> 0x7) & 0x7)
 738     {
 739       case 0x0:
 740       {
 741         if((insn.bits & 0x801f) == 0x2)
 742         {
 743           #include "insns/c_move.h"
 744           break;
 745         }
 746         if((insn.bits & 0x801f) == 0x8002)
 747         {
 748           #include "insns/c_j.h"
 749           break;
 750         }
 751         throw trap_illegal_instruction;
 752       }
 753       case 0x1:
 754       {
 755         if((insn.bits & 0x801f) == 0x2)
 756         {
 757           #include "insns/c_move.h"
 758           break;
 759         }
 760         if((insn.bits & 0x801f) == 0x8002)
 761         {
 762           #include "insns/c_j.h"
 763           break;
 764         }
 765         throw trap_illegal_instruction;
 766       }
 767       case 0x2:
 768       {
 769         if((insn.bits & 0x801f) == 0x2)
 770         {
 771           #include "insns/c_move.h"
 772           break;
 773         }
 774         if((insn.bits & 0x801f) == 0x8002)
 775         {
 776           #include "insns/c_j.h"
 777           break;
 778         }
 779         throw trap_illegal_instruction;
 780       }
 781       case 0x3:
 782       {
 783         if((insn.bits & 0x801f) == 0x2)
 784         {
 785           #include "insns/c_move.h"
 786           break;
 787         }
 788         if((insn.bits & 0x801f) == 0x8002)
 789         {
 790           #include "insns/c_j.h"
 791           break;
 792         }
 793         throw trap_illegal_instruction;
 794       }
 795       case 0x4:
 796       {
 797         if((insn.bits & 0x801f) == 0x2)
 798         {
 799           #include "insns/c_move.h"
 800           break;
 801         }
 802         if((insn.bits & 0x801f) == 0x8002)
 803         {
 804           #include "insns/c_j.h"
 805           break;
 806         }
 807         throw trap_illegal_instruction;
 808       }
 809       case 0x5:
 810       {
 811         if((insn.bits & 0x801f) == 0x2)
 812         {
 813           #include "insns/c_move.h"
 814           break;
 815         }
 816         if((insn.bits & 0x801f) == 0x8002)
 817         {
 818           #include "insns/c_j.h"
 819           break;
 820         }
 821         throw trap_illegal_instruction;
 822       }
 823       case 0x6:
 824       {
 825         if((insn.bits & 0x801f) == 0x2)
 826         {
 827           #include "insns/c_move.h"
 828           break;
 829         }
 830         if((insn.bits & 0x801f) == 0x8002)
 831         {
 832           #include "insns/c_j.h"
 833           break;
 834         }
 835         throw trap_illegal_instruction;
 836       }
 837       case 0x7:
 838       {
 839         if((insn.bits & 0x801f) == 0x2)
 840         {
 841           #include "insns/c_move.h"
 842           break;
 843         }
 844         if((insn.bits & 0x801f) == 0x8002)
 845         {
 846           #include "insns/c_j.h"
 847           break;
 848         }
 849         throw trap_illegal_instruction;
 850       }
 851       default:
 852       {
 853         throw trap_illegal_instruction;
 854       }
 855     }
 856     break;
 857   }
 858   case 0x23:
 859   {
 860     switch((insn.bits >> 0x7) & 0x7)
 861     {
 862       case 0x0:
 863       {
 864         #include "insns/sb.h"
 865         break;
 866       }
 867       case 0x1:
 868       {
 869         #include "insns/sh.h"
 870         break;
 871       }
 872       case 0x2:
 873       {
 874         #include "insns/sw.h"
 875         break;
 876       }
 877       case 0x3:
 878       {
 879         #include "insns/sd.h"
 880         break;
 881       }
 882       default:
 883       {
 884         throw trap_illegal_instruction;
 885       }
 886     }
 887     break;
 888   }
 889   case 0x27:
 890   {
 891     switch((insn.bits >> 0x7) & 0x7)
 892     {
 893       case 0x2:
 894       {
 895         #include "insns/fsw.h"
 896         break;
 897       }
 898       case 0x3:
 899       {
 900         #include "insns/fsd.h"
 901         break;
 902       }
 903       default:
 904       {
 905         throw trap_illegal_instruction;
 906       }
 907     }
 908     break;
 909   }
 910   case 0x2b:
 911   {
 912     switch((insn.bits >> 0x7) & 0x7)
 913     {
 914       case 0x2:
 915       {
 916         if((insn.bits & 0x1ffff) == 0x192b)
 917         {
 918           #include "insns/amominu_w.h"
 919           break;
 920         }
 921         if((insn.bits & 0x1ffff) == 0x92b)
 922         {
 923           #include "insns/amoand_w.h"
 924           break;
 925         }
 926         if((insn.bits & 0x1ffff) == 0x1d2b)
 927         {
 928           #include "insns/amomaxu_w.h"
 929           break;
 930         }
 931         if((insn.bits & 0x1ffff) == 0x152b)
 932         {
 933           #include "insns/amomax_w.h"
 934           break;
 935         }
 936         if((insn.bits & 0x1ffff) == 0x12b)
 937         {
 938           #include "insns/amoadd_w.h"
 939           break;
 940         }
 941         if((insn.bits & 0x1ffff) == 0xd2b)
 942         {
 943           #include "insns/amoor_w.h"
 944           break;
 945         }
 946         if((insn.bits & 0x1ffff) == 0x112b)
 947         {
 948           #include "insns/amomin_w.h"
 949           break;
 950         }
 951         if((insn.bits & 0x1ffff) == 0x52b)
 952         {
 953           #include "insns/amoswap_w.h"
 954           break;
 955         }
 956         throw trap_illegal_instruction;
 957       }
 958       case 0x3:
 959       {
 960         if((insn.bits & 0x1ffff) == 0x19ab)
 961         {
 962           #include "insns/amominu_d.h"
 963           break;
 964         }
 965         if((insn.bits & 0x1ffff) == 0x9ab)
 966         {
 967           #include "insns/amoand_d.h"
 968           break;
 969         }
 970         if((insn.bits & 0x1ffff) == 0x1dab)
 971         {
 972           #include "insns/amomaxu_d.h"
 973           break;
 974         }
 975         if((insn.bits & 0x1ffff) == 0x1ab)
 976         {
 977           #include "insns/amoadd_d.h"
 978           break;
 979         }
 980         if((insn.bits & 0x1ffff) == 0x15ab)
 981         {
 982           #include "insns/amomax_d.h"
 983           break;
 984         }
 985         if((insn.bits & 0x1ffff) == 0xdab)
 986         {
 987           #include "insns/amoor_d.h"
 988           break;
 989         }
 990         if((insn.bits & 0x1ffff) == 0x5ab)
 991         {
 992           #include "insns/amoswap_d.h"
 993           break;
 994         }
 995         if((insn.bits & 0x1ffff) == 0x11ab)
 996         {
 997           #include "insns/amomin_d.h"
 998           break;
 999         }
1000         throw trap_illegal_instruction;
1001       }
1002       default:
1003       {
1004         throw trap_illegal_instruction;
1005       }
1006     }
1007     break;
1008   }
1009   case 0x2f:
1010   {
1011     switch((insn.bits >> 0x7) & 0x7)
1012     {
1013       case 0x1:
1014       {
1015         #include "insns/fence_i.h"
1016         break;
1017       }
1018       case 0x2:
1019       {
1020         #include "insns/fence.h"
1021         break;
1022       }
1023       case 0x4:
1024       {
1025         #include "insns/fence_l_v.h"
1026         break;
1027       }
1028       case 0x5:
1029       {
1030         #include "insns/fence_g_v.h"
1031         break;
1032       }
1033       case 0x6:
1034       {
1035         #include "insns/fence_l_cv.h"
1036         break;
1037       }
1038       case 0x7:
1039       {
1040         #include "insns/fence_g_cv.h"
1041         break;
1042       }
1043       default:
1044       {
1045         throw trap_illegal_instruction;
1046       }
1047     }
1048     break;
1049   }
1050   case 0x33:
1051   {
1052     switch((insn.bits >> 0x7) & 0x7)
1053     {
1054       case 0x0:
1055       {
1056         if((insn.bits & 0x1ffff) == 0x33)
1057         {
1058           #include "insns/add.h"
1059           break;
1060         }
1061         if((insn.bits & 0x1ffff) == 0x433)
1062         {
1063           #include "insns/mul.h"
1064           break;
1065         }
1066         if((insn.bits & 0x1ffff) == 0x10033)
1067         {
1068           #include "insns/sub.h"
1069           break;
1070         }
1071         throw trap_illegal_instruction;
1072       }
1073       case 0x1:
1074       {
1075         if((insn.bits & 0x1ffff) == 0xb3)
1076         {
1077           #include "insns/sll.h"
1078           break;
1079         }
1080         if((insn.bits & 0x1ffff) == 0x4b3)
1081         {
1082           #include "insns/mulh.h"
1083           break;
1084         }
1085         throw trap_illegal_instruction;
1086       }
1087       case 0x2:
1088       {
1089         if((insn.bits & 0x1ffff) == 0x533)
1090         {
1091           #include "insns/mulhsu.h"
1092           break;
1093         }
1094         if((insn.bits & 0x1ffff) == 0x133)
1095         {
1096           #include "insns/slt.h"
1097           break;
1098         }
1099         throw trap_illegal_instruction;
1100       }
1101       case 0x3:
1102       {
1103         if((insn.bits & 0x1ffff) == 0x1b3)
1104         {
1105           #include "insns/sltu.h"
1106           break;
1107         }
1108         if((insn.bits & 0x1ffff) == 0x5b3)
1109         {
1110           #include "insns/mulhu.h"
1111           break;
1112         }
1113         throw trap_illegal_instruction;
1114       }
1115       case 0x4:
1116       {
1117         if((insn.bits & 0x1ffff) == 0x633)
1118         {
1119           #include "insns/div.h"
1120           break;
1121         }
1122         if((insn.bits & 0x1ffff) == 0x233)
1123         {
1124           #include "insns/xor.h"
1125           break;
1126         }
1127         throw trap_illegal_instruction;
1128       }
1129       case 0x5:
1130       {
1131         if((insn.bits & 0x1ffff) == 0x102b3)
1132         {
1133           #include "insns/sra.h"
1134           break;
1135         }
1136         if((insn.bits & 0x1ffff) == 0x2b3)
1137         {
1138           #include "insns/srl.h"
1139           break;
1140         }
1141         if((insn.bits & 0x1ffff) == 0x6b3)
1142         {
1143           #include "insns/divu.h"
1144           break;
1145         }
1146         throw trap_illegal_instruction;
1147       }
1148       case 0x6:
1149       {
1150         if((insn.bits & 0x1ffff) == 0x733)
1151         {
1152           #include "insns/rem.h"
1153           break;
1154         }
1155         if((insn.bits & 0x1ffff) == 0x333)
1156         {
1157           #include "insns/or.h"
1158           break;
1159         }
1160         throw trap_illegal_instruction;
1161       }
1162       case 0x7:
1163       {
1164         if((insn.bits & 0x1ffff) == 0x7b3)
1165         {
1166           #include "insns/remu.h"
1167           break;
1168         }
1169         if((insn.bits & 0x1ffff) == 0x3b3)
1170         {
1171           #include "insns/and.h"
1172           break;
1173         }
1174         throw trap_illegal_instruction;
1175       }
1176       default:
1177       {
1178         throw trap_illegal_instruction;
1179       }
1180     }
1181     break;
1182   }
1183   case 0x37:
1184   {
1185     #include "insns/lui.h"
1186     break;
1187   }
1188   case 0x3b:
1189   {
1190     switch((insn.bits >> 0x7) & 0x7)
1191     {
1192       case 0x0:
1193       {
1194         if((insn.bits & 0x1ffff) == 0x43b)
1195         {
1196           #include "insns/mulw.h"
1197           break;
1198         }
1199         if((insn.bits & 0x1ffff) == 0x3b)
1200         {
1201           #include "insns/addw.h"
1202           break;
1203         }
1204         if((insn.bits & 0x1ffff) == 0x1003b)
1205         {
1206           #include "insns/subw.h"
1207           break;
1208         }
1209         throw trap_illegal_instruction;
1210       }
1211       case 0x1:
1212       {
1213         if((insn.bits & 0x1ffff) == 0xbb)
1214         {
1215           #include "insns/sllw.h"
1216           break;
1217         }
1218         throw trap_illegal_instruction;
1219       }
1220       case 0x4:
1221       {
1222         if((insn.bits & 0x1ffff) == 0x63b)
1223         {
1224           #include "insns/divw.h"
1225           break;
1226         }
1227         throw trap_illegal_instruction;
1228       }
1229       case 0x5:
1230       {
1231         if((insn.bits & 0x1ffff) == 0x6bb)
1232         {
1233           #include "insns/divuw.h"
1234           break;
1235         }
1236         if((insn.bits & 0x1ffff) == 0x2bb)
1237         {
1238           #include "insns/srlw.h"
1239           break;
1240         }
1241         if((insn.bits & 0x1ffff) == 0x102bb)
1242         {
1243           #include "insns/sraw.h"
1244           break;
1245         }
1246         throw trap_illegal_instruction;
1247       }
1248       case 0x6:
1249       {
1250         if((insn.bits & 0x1ffff) == 0x73b)
1251         {
1252           #include "insns/remw.h"
1253           break;
1254         }
1255         throw trap_illegal_instruction;
1256       }
1257       case 0x7:
1258       {
1259         if((insn.bits & 0x1ffff) == 0x7bb)
1260         {
1261           #include "insns/remuw.h"
1262           break;
1263         }
1264         throw trap_illegal_instruction;
1265       }
1266       default:
1267       {
1268         throw trap_illegal_instruction;
1269       }
1270     }
1271     break;
1272   }
1273   case 0x40:
1274   {
1275     #include "insns/c_addi.h"
1276     break;
1277   }
1278   case 0x41:
1279   {
1280     #include "insns/c_li.h"
1281     break;
1282   }
1283   case 0x42:
1284   {
1285     switch((insn.bits >> 0x7) & 0x7)
1286     {
1287       case 0x0:
1288       {
1289         if((insn.bits & 0x801f) == 0x2)
1290         {
1291           #include "insns/c_move.h"
1292           break;
1293         }
1294         if((insn.bits & 0x801f) == 0x8002)
1295         {
1296           #include "insns/c_j.h"
1297           break;
1298         }
1299         throw trap_illegal_instruction;
1300       }
1301       case 0x1:
1302       {
1303         if((insn.bits & 0x801f) == 0x2)
1304         {
1305           #include "insns/c_move.h"
1306           break;
1307         }
1308         if((insn.bits & 0x801f) == 0x8002)
1309         {
1310           #include "insns/c_j.h"
1311           break;
1312         }
1313         throw trap_illegal_instruction;
1314       }
1315       case 0x2:
1316       {
1317         if((insn.bits & 0x801f) == 0x2)
1318         {
1319           #include "insns/c_move.h"
1320           break;
1321         }
1322         if((insn.bits & 0x801f) == 0x8002)
1323         {
1324           #include "insns/c_j.h"
1325           break;
1326         }
1327         throw trap_illegal_instruction;
1328       }
1329       case 0x3:
1330       {
1331         if((insn.bits & 0x801f) == 0x2)
1332         {
1333           #include "insns/c_move.h"
1334           break;
1335         }
1336         if((insn.bits & 0x801f) == 0x8002)
1337         {
1338           #include "insns/c_j.h"
1339           break;
1340         }
1341         throw trap_illegal_instruction;
1342       }
1343       case 0x4:
1344       {
1345         if((insn.bits & 0x801f) == 0x2)
1346         {
1347           #include "insns/c_move.h"
1348           break;
1349         }
1350         if((insn.bits & 0x801f) == 0x8002)
1351         {
1352           #include "insns/c_j.h"
1353           break;
1354         }
1355         throw trap_illegal_instruction;
1356       }
1357       case 0x5:
1358       {
1359         if((insn.bits & 0x801f) == 0x2)
1360         {
1361           #include "insns/c_move.h"
1362           break;
1363         }
1364         if((insn.bits & 0x801f) == 0x8002)
1365         {
1366           #include "insns/c_j.h"
1367           break;
1368         }
1369         throw trap_illegal_instruction;
1370       }
1371       case 0x6:
1372       {
1373         if((insn.bits & 0x801f) == 0x2)
1374         {
1375           #include "insns/c_move.h"
1376           break;
1377         }
1378         if((insn.bits & 0x801f) == 0x8002)
1379         {
1380           #include "insns/c_j.h"
1381           break;
1382         }
1383         throw trap_illegal_instruction;
1384       }
1385       case 0x7:
1386       {
1387         if((insn.bits & 0x801f) == 0x2)
1388         {
1389           #include "insns/c_move.h"
1390           break;
1391         }
1392         if((insn.bits & 0x801f) == 0x8002)
1393         {
1394           #include "insns/c_j.h"
1395           break;
1396         }
1397         throw trap_illegal_instruction;
1398       }
1399       default:
1400       {
1401         throw trap_illegal_instruction;
1402       }
1403     }
1404     break;
1405   }
1406   case 0x43:
1407   {
1408     switch((insn.bits >> 0x7) & 0x7)
1409     {
1410       case 0x0:
1411       {
1412         #include "insns/fmadd_s.h"
1413         break;
1414       }
1415       case 0x1:
1416       {
1417         #include "insns/fmadd_d.h"
1418         break;
1419       }
1420       case 0x4:
1421       {
1422         #include "insns/fmadd_s.h"
1423         break;
1424       }
1425       case 0x5:
1426       {
1427         #include "insns/fmadd_d.h"
1428         break;
1429       }
1430       default:
1431       {
1432         throw trap_illegal_instruction;
1433       }
1434     }
1435     break;
1436   }
1437   case 0x47:
1438   {
1439     switch((insn.bits >> 0x7) & 0x7)
1440     {
1441       case 0x0:
1442       {
1443         #include "insns/fmsub_s.h"
1444         break;
1445       }
1446       case 0x1:
1447       {
1448         #include "insns/fmsub_d.h"
1449         break;
1450       }
1451       case 0x4:
1452       {
1453         #include "insns/fmsub_s.h"
1454         break;
1455       }
1456       case 0x5:
1457       {
1458         #include "insns/fmsub_d.h"
1459         break;
1460       }
1461       default:
1462       {
1463         throw trap_illegal_instruction;
1464       }
1465     }
1466     break;
1467   }
1468   case 0x4b:
1469   {
1470     switch((insn.bits >> 0x7) & 0x7)
1471     {
1472       case 0x0:
1473       {
1474         #include "insns/fnmsub_s.h"
1475         break;
1476       }
1477       case 0x1:
1478       {
1479         #include "insns/fnmsub_d.h"
1480         break;
1481       }
1482       case 0x4:
1483       {
1484         #include "insns/fnmsub_s.h"
1485         break;
1486       }
1487       case 0x5:
1488       {
1489         #include "insns/fnmsub_d.h"
1490         break;
1491       }
1492       default:
1493       {
1494         throw trap_illegal_instruction;
1495       }
1496     }
1497     break;
1498   }
1499   case 0x4f:
1500   {
1501     switch((insn.bits >> 0x7) & 0x7)
1502     {
1503       case 0x0:
1504       {
1505         #include "insns/fnmadd_s.h"
1506         break;
1507       }
1508       case 0x1:
1509       {
1510         #include "insns/fnmadd_d.h"
1511         break;
1512       }
1513       case 0x4:
1514       {
1515         #include "insns/fnmadd_s.h"
1516         break;
1517       }
1518       case 0x5:
1519       {
1520         #include "insns/fnmadd_d.h"
1521         break;
1522       }
1523       default:
1524       {
1525         throw trap_illegal_instruction;
1526       }
1527     }
1528     break;
1529   }
1530   case 0x53:
1531   {
1532     switch((insn.bits >> 0x7) & 0x7)
1533     {
1534       case 0x0:
1535       {
1536         if((insn.bits & 0x3ff1ff) == 0x9053)
1537         {
1538           #include "insns/fcvt_lu_s.h"
1539           break;
1540         }
1541         if((insn.bits & 0x1ffff) == 0x18053)
1542         {
1543           #include "insns/fmin_s.h"
1544           break;
1545         }
1546         if((insn.bits & 0x3ff1ff) == 0x11053)
1547         {
1548           #include "insns/fcvt_s_d.h"
1549           break;
1550         }
1551         if((insn.bits & 0x3ff1ff) == 0xe053)
1552         {
1553           #include "insns/fcvt_s_w.h"
1554           break;
1555         }
1556         if((insn.bits & 0x7c1ffff) == 0x1c053)
1557         {
1558           #include "insns/mftx_s.h"
1559           break;
1560         }
1561         if((insn.bits & 0x3ff1ff) == 0x8053)
1562         {
1563           #include "insns/fcvt_l_s.h"
1564           break;
1565         }
1566         if((insn.bits & 0x1ffff) == 0x17053)
1567         {
1568           #include "insns/fle_s.h"
1569           break;
1570         }
1571         if((insn.bits & 0x7ffffff) == 0x1d053)
1572         {
1573           #include "insns/mffsr.h"
1574           break;
1575         }
1576         if((insn.bits & 0x1f1ff) == 0x3053)
1577         {
1578           #include "insns/fdiv_s.h"
1579           break;
1580         }
1581         if((insn.bits & 0x3fffff) == 0x1f053)
1582         {
1583           #include "insns/mtfsr.h"
1584           break;
1585         }
1586         if((insn.bits & 0x3ff1ff) == 0xd053)
1587         {
1588           #include "insns/fcvt_s_lu.h"
1589           break;
1590         }
1591         if((insn.bits & 0x1f1ff) == 0x2053)
1592         {
1593           #include "insns/fmul_s.h"
1594           break;
1595         }
1596         if((insn.bits & 0x1ffff) == 0x16053)
1597         {
1598           #include "insns/flt_s.h"
1599           break;
1600         }
1601         if((insn.bits & 0x1ffff) == 0x15053)
1602         {
1603           #include "insns/feq_s.h"
1604           break;
1605         }
1606         if((insn.bits & 0x1ffff) == 0x7053)
1607         {
1608           #include "insns/fsgnjx_s.h"
1609           break;
1610         }
1611         if((insn.bits & 0x1ffff) == 0x19053)
1612         {
1613           #include "insns/fmax_s.h"
1614           break;
1615         }
1616         if((insn.bits & 0x3ff1ff) == 0xb053)
1617         {
1618           #include "insns/fcvt_wu_s.h"
1619           break;
1620         }
1621         if((insn.bits & 0x3ff1ff) == 0xa053)
1622         {
1623           #include "insns/fcvt_w_s.h"
1624           break;
1625         }
1626         if((insn.bits & 0x3fffff) == 0x1e053)
1627         {
1628           #include "insns/mxtf_s.h"
1629           break;
1630         }
1631         if((insn.bits & 0x1f1ff) == 0x1053)
1632         {
1633           #include "insns/fsub_s.h"
1634           break;
1635         }
1636         if((insn.bits & 0x1ffff) == 0x5053)
1637         {
1638           #include "insns/fsgnj_s.h"
1639           break;
1640         }
1641         if((insn.bits & 0x3ff1ff) == 0xf053)
1642         {
1643           #include "insns/fcvt_s_wu.h"
1644           break;
1645         }
1646         if((insn.bits & 0x3ff1ff) == 0xc053)
1647         {
1648           #include "insns/fcvt_s_l.h"
1649           break;
1650         }
1651         if((insn.bits & 0x3ff1ff) == 0x4053)
1652         {
1653           #include "insns/fsqrt_s.h"
1654           break;
1655         }
1656         if((insn.bits & 0x1ffff) == 0x6053)
1657         {
1658           #include "insns/fsgnjn_s.h"
1659           break;
1660         }
1661         if((insn.bits & 0x1f1ff) == 0x53)
1662         {
1663           #include "insns/fadd_s.h"
1664           break;
1665         }
1666         throw trap_illegal_instruction;
1667       }
1668       case 0x1:
1669       {
1670         if((insn.bits & 0x1ffff) == 0x180d3)
1671         {
1672           #include "insns/fmin_d.h"
1673           break;
1674         }
1675         if((insn.bits & 0x3ff1ff) == 0xc0d3)
1676         {
1677           #include "insns/fcvt_d_l.h"
1678           break;
1679         }
1680         if((insn.bits & 0x3fffff) == 0xe0d3)
1681         {
1682           #include "insns/fcvt_d_w.h"
1683           break;
1684         }
1685         if((insn.bits & 0x3fffff) == 0x100d3)
1686         {
1687           #include "insns/fcvt_d_s.h"
1688           break;
1689         }
1690         if((insn.bits & 0x1ffff) == 0x190d3)
1691         {
1692           #include "insns/fmax_d.h"
1693           break;
1694         }
1695         if((insn.bits & 0x7c1ffff) == 0x1c0d3)
1696         {
1697           #include "insns/mftx_d.h"
1698           break;
1699         }
1700         if((insn.bits & 0x1ffff) == 0x170d3)
1701         {
1702           #include "insns/fle_d.h"
1703           break;
1704         }
1705         if((insn.bits & 0x1ffff) == 0x160d3)
1706         {
1707           #include "insns/flt_d.h"
1708           break;
1709         }
1710         if((insn.bits & 0x1f1ff) == 0x20d3)
1711         {
1712           #include "insns/fmul_d.h"
1713           break;
1714         }
1715         if((insn.bits & 0x1ffff) == 0x70d3)
1716         {
1717           #include "insns/fsgnjx_d.h"
1718           break;
1719         }
1720         if((insn.bits & 0x1ffff) == 0x150d3)
1721         {
1722           #include "insns/feq_d.h"
1723           break;
1724         }
1725         if((insn.bits & 0x3fffff) == 0xf0d3)
1726         {
1727           #include "insns/fcvt_d_wu.h"
1728           break;
1729         }
1730         if((insn.bits & 0x3ff1ff) == 0xb0d3)
1731         {
1732           #include "insns/fcvt_wu_d.h"
1733           break;
1734         }
1735         if((insn.bits & 0x1ffff) == 0x60d3)
1736         {
1737           #include "insns/fsgnjn_d.h"
1738           break;
1739         }
1740         if((insn.bits & 0x3ff1ff) == 0xd0d3)
1741         {
1742           #include "insns/fcvt_d_lu.h"
1743           break;
1744         }
1745         if((insn.bits & 0x3ff1ff) == 0xa0d3)
1746         {
1747           #include "insns/fcvt_w_d.h"
1748           break;
1749         }
1750         if((insn.bits & 0x3fffff) == 0x1e0d3)
1751         {
1752           #include "insns/mxtf_d.h"
1753           break;
1754         }
1755         if((insn.bits & 0x1ffff) == 0x50d3)
1756         {
1757           #include "insns/fsgnj_d.h"
1758           break;
1759         }
1760         if((insn.bits & 0x3ff1ff) == 0x80d3)
1761         {
1762           #include "insns/fcvt_l_d.h"
1763           break;
1764         }
1765         if((insn.bits & 0x1f1ff) == 0xd3)
1766         {
1767           #include "insns/fadd_d.h"
1768           break;
1769         }
1770         if((insn.bits & 0x3ff1ff) == 0x90d3)
1771         {
1772           #include "insns/fcvt_lu_d.h"
1773           break;
1774         }
1775         if((insn.bits & 0x1f1ff) == 0x10d3)
1776         {
1777           #include "insns/fsub_d.h"
1778           break;
1779         }
1780         if((insn.bits & 0x3ff1ff) == 0x40d3)
1781         {
1782           #include "insns/fsqrt_d.h"
1783           break;
1784         }
1785         if((insn.bits & 0x1f1ff) == 0x30d3)
1786         {
1787           #include "insns/fdiv_d.h"
1788           break;
1789         }
1790         throw trap_illegal_instruction;
1791       }
1792       case 0x4:
1793       {
1794         if((insn.bits & 0x3ff1ff) == 0x9053)
1795         {
1796           #include "insns/fcvt_lu_s.h"
1797           break;
1798         }
1799         if((insn.bits & 0x3ff1ff) == 0x11053)
1800         {
1801           #include "insns/fcvt_s_d.h"
1802           break;
1803         }
1804         if((insn.bits & 0x3ff1ff) == 0xe053)
1805         {
1806           #include "insns/fcvt_s_w.h"
1807           break;
1808         }
1809         if((insn.bits & 0x3ff1ff) == 0x8053)
1810         {
1811           #include "insns/fcvt_l_s.h"
1812           break;
1813         }
1814         if((insn.bits & 0x1f1ff) == 0x3053)
1815         {
1816           #include "insns/fdiv_s.h"
1817           break;
1818         }
1819         if((insn.bits & 0x3ff1ff) == 0xd053)
1820         {
1821           #include "insns/fcvt_s_lu.h"
1822           break;
1823         }
1824         if((insn.bits & 0x1f1ff) == 0x2053)
1825         {
1826           #include "insns/fmul_s.h"
1827           break;
1828         }
1829         if((insn.bits & 0x3ff1ff) == 0xb053)
1830         {
1831           #include "insns/fcvt_wu_s.h"
1832           break;
1833         }
1834         if((insn.bits & 0x3ff1ff) == 0xa053)
1835         {
1836           #include "insns/fcvt_w_s.h"
1837           break;
1838         }
1839         if((insn.bits & 0x1f1ff) == 0x1053)
1840         {
1841           #include "insns/fsub_s.h"
1842           break;
1843         }
1844         if((insn.bits & 0x3ff1ff) == 0xf053)
1845         {
1846           #include "insns/fcvt_s_wu.h"
1847           break;
1848         }
1849         if((insn.bits & 0x3ff1ff) == 0xc053)
1850         {
1851           #include "insns/fcvt_s_l.h"
1852           break;
1853         }
1854         if((insn.bits & 0x3ff1ff) == 0x4053)
1855         {
1856           #include "insns/fsqrt_s.h"
1857           break;
1858         }
1859         if((insn.bits & 0x1f1ff) == 0x53)
1860         {
1861           #include "insns/fadd_s.h"
1862           break;
1863         }
1864         throw trap_illegal_instruction;
1865       }
1866       case 0x5:
1867       {
1868         if((insn.bits & 0x3ff1ff) == 0xc0d3)
1869         {
1870           #include "insns/fcvt_d_l.h"
1871           break;
1872         }
1873         if((insn.bits & 0x1f1ff) == 0x20d3)
1874         {
1875           #include "insns/fmul_d.h"
1876           break;
1877         }
1878         if((insn.bits & 0x3ff1ff) == 0xb0d3)
1879         {
1880           #include "insns/fcvt_wu_d.h"
1881           break;
1882         }
1883         if((insn.bits & 0x3ff1ff) == 0xd0d3)
1884         {
1885           #include "insns/fcvt_d_lu.h"
1886           break;
1887         }
1888         if((insn.bits & 0x3ff1ff) == 0xa0d3)
1889         {
1890           #include "insns/fcvt_w_d.h"
1891           break;
1892         }
1893         if((insn.bits & 0x3ff1ff) == 0x80d3)
1894         {
1895           #include "insns/fcvt_l_d.h"
1896           break;
1897         }
1898         if((insn.bits & 0x1f1ff) == 0xd3)
1899         {
1900           #include "insns/fadd_d.h"
1901           break;
1902         }
1903         if((insn.bits & 0x3ff1ff) == 0x90d3)
1904         {
1905           #include "insns/fcvt_lu_d.h"
1906           break;
1907         }
1908         if((insn.bits & 0x1f1ff) == 0x10d3)
1909         {
1910           #include "insns/fsub_d.h"
1911           break;
1912         }
1913         if((insn.bits & 0x3ff1ff) == 0x40d3)
1914         {
1915           #include "insns/fsqrt_d.h"
1916           break;
1917         }
1918         if((insn.bits & 0x1f1ff) == 0x30d3)
1919         {
1920           #include "insns/fdiv_d.h"
1921           break;
1922         }
1923         throw trap_illegal_instruction;
1924       }
1925       default:
1926       {
1927         throw trap_illegal_instruction;
1928       }
1929     }
1930     break;
1931   }
1932   case 0x60:
1933   {
1934     #include "insns/c_addi.h"
1935     break;
1936   }
1937   case 0x61:
1938   {
1939     #include "insns/c_li.h"
1940     break;
1941   }
1942   case 0x62:
1943   {
1944     switch((insn.bits >> 0x7) & 0x7)
1945     {
1946       case 0x0:
1947       {
1948         if((insn.bits & 0x801f) == 0x2)
1949         {
1950           #include "insns/c_move.h"
1951           break;
1952         }
1953         if((insn.bits & 0x801f) == 0x8002)
1954         {
1955           #include "insns/c_j.h"
1956           break;
1957         }
1958         throw trap_illegal_instruction;
1959       }
1960       case 0x1:
1961       {
1962         if((insn.bits & 0x801f) == 0x2)
1963         {
1964           #include "insns/c_move.h"
1965           break;
1966         }
1967         if((insn.bits & 0x801f) == 0x8002)
1968         {
1969           #include "insns/c_j.h"
1970           break;
1971         }
1972         throw trap_illegal_instruction;
1973       }
1974       case 0x2:
1975       {
1976         if((insn.bits & 0x801f) == 0x2)
1977         {
1978           #include "insns/c_move.h"
1979           break;
1980         }
1981         if((insn.bits & 0x801f) == 0x8002)
1982         {
1983           #include "insns/c_j.h"
1984           break;
1985         }
1986         throw trap_illegal_instruction;
1987       }
1988       case 0x3:
1989       {
1990         if((insn.bits & 0x801f) == 0x2)
1991         {
1992           #include "insns/c_move.h"
1993           break;
1994         }
1995         if((insn.bits & 0x801f) == 0x8002)
1996         {
1997           #include "insns/c_j.h"
1998           break;
1999         }
2000         throw trap_illegal_instruction;
2001       }
2002       case 0x4:
2003       {
2004         if((insn.bits & 0x801f) == 0x2)
2005         {
2006           #include "insns/c_move.h"
2007           break;
2008         }
2009         if((insn.bits & 0x801f) == 0x8002)
2010         {
2011           #include "insns/c_j.h"
2012           break;
2013         }
2014         throw trap_illegal_instruction;
2015       }
2016       case 0x5:
2017       {
2018         if((insn.bits & 0x801f) == 0x2)
2019         {
2020           #include "insns/c_move.h"
2021           break;
2022         }
2023         if((insn.bits & 0x801f) == 0x8002)
2024         {
2025           #include "insns/c_j.h"
2026           break;
2027         }
2028         throw trap_illegal_instruction;
2029       }
2030       case 0x6:
2031       {
2032         if((insn.bits & 0x801f) == 0x2)
2033         {
2034           #include "insns/c_move.h"
2035           break;
2036         }
2037         if((insn.bits & 0x801f) == 0x8002)
2038         {
2039           #include "insns/c_j.h"
2040           break;
2041         }
2042         throw trap_illegal_instruction;
2043       }
2044       case 0x7:
2045       {
2046         if((insn.bits & 0x801f) == 0x2)
2047         {
2048           #include "insns/c_move.h"
2049           break;
2050         }
2051         if((insn.bits & 0x801f) == 0x8002)
2052         {
2053           #include "insns/c_j.h"
2054           break;
2055         }
2056         throw trap_illegal_instruction;
2057       }
2058       default:
2059       {
2060         throw trap_illegal_instruction;
2061       }
2062     }
2063     break;
2064   }
2065   case 0x63:
2066   {
2067     switch((insn.bits >> 0x7) & 0x7)
2068     {
2069       case 0x0:
2070       {
2071         #include "insns/beq.h"
2072         break;
2073       }
2074       case 0x1:
2075       {
2076         #include "insns/bne.h"
2077         break;
2078       }
2079       case 0x4:
2080       {
2081         #include "insns/blt.h"
2082         break;
2083       }
2084       case 0x5:
2085       {
2086         #include "insns/bge.h"
2087         break;
2088       }
2089       case 0x6:
2090       {
2091         #include "insns/bltu.h"
2092         break;
2093       }
2094       case 0x7:
2095       {
2096         #include "insns/bgeu.h"
2097         break;
2098       }
2099       default:
2100       {
2101         throw trap_illegal_instruction;
2102       }
2103     }
2104     break;
2105   }
2106   case 0x67:
2107   {
2108     #include "insns/j.h"
2109     break;
2110   }
2111   case 0x6b:
2112   {
2113     switch((insn.bits >> 0x7) & 0x7)
2114     {
2115       case 0x0:
2116       {
2117         #include "insns/jalr_c.h"
2118         break;
2119       }
2120       case 0x1:
2121       {
2122         #include "insns/jalr_r.h"
2123         break;
2124       }
2125       case 0x2:
2126       {
2127         #include "insns/jalr_j.h"
2128         break;
2129       }
2130       case 0x4:
2131       {
2132         if((insn.bits & 0x7ffffff) == 0x26b)
2133         {
2134           #include "insns/rdnpc.h"
2135           break;
2136         }
2137         throw trap_illegal_instruction;
2138       }
2139       default:
2140       {
2141         throw trap_illegal_instruction;
2142       }
2143     }
2144     break;
2145   }
2146   case 0x6f:
2147   {
2148     #include "insns/jal.h"
2149     break;
2150   }
2151   case 0x73:
2152   {
2153     switch((insn.bits >> 0x7) & 0x7)
2154     {
2155       case 0x0:
2156       {
2157         #include "insns/vcfgivl.h"
2158         break;
2159       }
2160       case 0x1:
2161       {
2162         if((insn.bits & 0x3fffff) == 0xf3)
2163         {
2164           #include "insns/setvl.h"
2165           break;
2166         }
2167         throw trap_illegal_instruction;
2168       }
2169       case 0x2:
2170       {
2171         if((insn.bits & 0xf80003ff) == 0x173)
2172         {
2173           #include "insns/vf.h"
2174           break;
2175         }
2176         throw trap_illegal_instruction;
2177       }
2178       default:
2179       {
2180         throw trap_illegal_instruction;
2181       }
2182     }
2183     break;
2184   }
2185   case 0x77:
2186   {
2187     switch((insn.bits >> 0x7) & 0x7)
2188     {
2189       case 0x0:
2190       {
2191         if((insn.bits & 0xffffffff) == 0x77)
2192         {
2193           #include "insns/syscall.h"
2194           break;
2195         }
2196         throw trap_illegal_instruction;
2197       }
2198       case 0x1:
2199       {
2200         if((insn.bits & 0xffffffff) == 0xf7)
2201         {
2202           #include "insns/break.h"
2203           break;
2204         }
2205         throw trap_illegal_instruction;
2206       }
2207       case 0x2:
2208       {
2209         if((insn.bits & 0xffffffff) == 0x177)
2210         {
2211           #include "insns/stop.h"
2212           break;
2213         }
2214         throw trap_illegal_instruction;
2215       }
2216       case 0x3:
2217       {
2218         if((insn.bits & 0x7ffffff) == 0x1f7)
2219         {
2220           #include "insns/utidx.h"
2221           break;
2222         }
2223         throw trap_illegal_instruction;
2224       }
2225       default:
2226       {
2227         throw trap_illegal_instruction;
2228       }
2229     }
2230     break;
2231   }
2232   case 0x7b:
2233   {
2234     switch((insn.bits >> 0x7) & 0x7)
2235     {
2236       case 0x0:
2237       {
2238         if((insn.bits & 0x7ffffff) == 0x7b)
2239         {
2240           #include "insns/ei.h"
2241           break;
2242         }
2243         throw trap_illegal_instruction;
2244       }
2245       case 0x1:
2246       {
2247         if((insn.bits & 0x7ffffff) == 0xfb)
2248         {
2249           #include "insns/di.h"
2250           break;
2251         }
2252         throw trap_illegal_instruction;
2253       }
2254       case 0x2:
2255       {
2256         if((insn.bits & 0x7c1ffff) == 0x17b)
2257         {
2258           #include "insns/mfpcr.h"
2259           break;
2260         }
2261         throw trap_illegal_instruction;
2262       }
2263       case 0x3:
2264       {
2265         if((insn.bits & 0xf801ffff) == 0x1fb)
2266         {
2267           #include "insns/mtpcr.h"
2268           break;
2269         }
2270         throw trap_illegal_instruction;
2271       }
2272       case 0x4:
2273       {
2274         if((insn.bits & 0xffffffff) == 0x27b)
2275         {
2276           #include "insns/eret.h"
2277           break;
2278         }
2279         throw trap_illegal_instruction;
2280       }
2281       default:
2282       {
2283         throw trap_illegal_instruction;
2284       }
2285     }
2286     break;
2287   }
2288   default:
2289   {
2290     throw trap_illegal_instruction;
2291   }
2292 }