[sim,xcc] Changed instruction format to RISC-V
[riscv-isa-sim.git] / riscv / processor.cc
1 #include <bfd.h>
2 #include <dis-asm.h>
3 #include <cstdlib>
4 #include <iostream>
5 #include "processor.h"
6 #include "common.h"
7 #include "config.h"
8 #include "sim.h"
9
10 processor_t::processor_t(sim_t* _sim, char* _mem, size_t _memsz)
11 : sim(_sim), mmu(_mem,_memsz)
12 {
13 memset(R,0,sizeof(R));
14 pc = 0;
15 ebase = 0;
16 epc = 0;
17 badvaddr = 0;
18 set_sr(SR_S);
19
20 memset(counters,0,sizeof(counters));
21
22 static_assert(sizeof(insn_t) == 4);
23 static_assert(sizeof(uint128_t) == 16 && sizeof(int128_t) == 16);
24 }
25
26 void processor_t::init(uint32_t _id)
27 {
28 id = _id;
29 }
30
31 void processor_t::set_sr(uint32_t val)
32 {
33 sr = val & ~SR_ZERO;
34 if(support_64bit)
35 sr |= SR_KX;
36 else
37 sr &= ~(SR_KX | SR_UX);
38
39 gprlen = ((sr & SR_S) ? (sr & SR_KX) : (sr & SR_UX)) ? 64 : 32;
40 }
41
42 void processor_t::step(size_t n, bool noisy)
43 {
44 size_t i = 0;
45 while(1) try
46 {
47 for( ; i < n; i++)
48 {
49 insn_t insn = mmu.load_insn(pc);
50
51 reg_t npc = pc+sizeof(insn);
52
53 if(noisy)
54 disasm(insn,pc);
55
56 #include "execute.h"
57
58 pc = npc;
59 R[0] = 0;
60
61 counters[0]++;
62 }
63 return;
64 }
65 catch(trap_t t)
66 {
67 i++;
68 take_trap(t);
69 }
70 }
71
72 void processor_t::take_trap(trap_t t)
73 {
74 demand(t < NUM_TRAPS, "internal error: bad trap number %d", int(t));
75 demand(sr & SR_ET, "error mode on core %d!\ntrap %s, pc 0x%016llx",
76 id, trap_name(t), (unsigned long long)pc);
77
78 set_sr((((sr & ~SR_ET) | SR_S) & ~SR_PS) | ((sr & SR_S) ? SR_PS : 0));
79 epc = pc;
80 pc = ebase + t*128;
81 badvaddr = mmu.get_badvaddr();
82 }
83
84 void processor_t::disasm(insn_t insn, reg_t pc)
85 {
86 printf("core %3d: 0x%016llx (0x%08x) ",id,(unsigned long long)pc,insn.bits);
87
88 #ifdef RISCV_HAVE_LIBOPCODES
89 disassemble_info info;
90 INIT_DISASSEMBLE_INFO(info, stdout, fprintf);
91 info.flavour = bfd_target_unknown_flavour;
92 info.arch = bfd_arch_mips;
93 info.mach = 101; // XXX bfd_mach_mips_riscv requires modified bfd.h
94 info.endian = BFD_ENDIAN_LITTLE;
95 info.buffer = (bfd_byte*)&insn;
96 info.buffer_length = sizeof(insn);
97 info.buffer_vma = pc;
98
99 demand(print_insn_little_mips(pc, &info) == sizeof(insn), "disasm bug!");
100 #else
101 printf("unknown");
102 #endif
103 printf("\n");
104 }