[opcodes, sim, xcc] made *w insns illegal in RV32

[riscv-isa-sim.git] / riscv / insns / addiw.h

diff --git a/riscv/insns/addiw.h b/riscv/insns/addiw.h
index cf97d342432921a6341bd88547d8c8aecad000e0..23ae2788407d8721196b69b284e845a62f04ef0d 100644 (file)
--- a/riscv/insns/addiw.h
+++ b/riscv/insns/addiw.h
@@ -1 +1,2 @@
+require_xpr64;
 RD = sext32(SIMM + RS1);