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[opcodes, sim, xcc] made *w insns illegal in RV32
[riscv-isa-sim.git]
/
riscv
/
insns
/
amo_and.h
diff --git
a/riscv/insns/amo_and.h
b/riscv/insns/amo_and.h
index 729550194e0ad85ee45f29781e0eb166625c5e62..586eb7fb9683ebfa6b78874de10a923e5ec936bb 100644
(file)
--- a/
riscv/insns/amo_and.h
+++ b/
riscv/insns/amo_and.h
@@
-1,4
+1,4
@@
-require64;
+require
_xpr
64;
reg_t v = mmu.load_uint64(RS1);
mmu.store_uint64(RS1, RS2 & v);
RD = v;