[sim] add vt stuff

[riscv-isa-sim.git] / riscv / insns / fmov_sv.h

diff --git a/riscv/insns/fmov_sv.h b/riscv/insns/fmov_sv.h
index e69de29bb2d1d6434b8b29ae775ad8c2e48c5391..b689ed85aced2a0c71d693396799a3b38b2c1383 100644 (file)
--- a/riscv/insns/fmov_sv.h
+++ b/riscv/insns/fmov_sv.h
@@ -0,0 +1,4 @@
+require_fp;
+UT_LOOP_START
+  UT_LOOP_FRD = FRS1;
+UT_LOOP_END