[opcodes, sim, xcc] made *w insns illegal in RV32

[riscv-isa-sim.git] / riscv / insns / ld.h

diff --git a/riscv/insns/ld.h b/riscv/insns/ld.h
index 973a8b3bc25370d6d5b2094716a06a6bc41b0381..940d348f07171e6ba0532f63f5546614704587ed 100644 (file)
--- a/riscv/insns/ld.h
+++ b/riscv/insns/ld.h
@@ -1,2 +1,2 @@
-require64;
+require_xpr64;
 RD = mmu.load_int64(RS1+SIMM);