[sim] add vt stuff

[riscv-isa-sim.git] / riscv / insns / ldst_v.h

diff --git a/riscv/insns/ldst_v.h b/riscv/insns/ldst_v.h
index e69de29bb2d1d6434b8b29ae775ad8c2e48c5391..84aa0fc5d58eee98886055d64638c689a2ff118a 100644 (file)
--- a/riscv/insns/ldst_v.h
+++ b/riscv/insns/ldst_v.h
@@ -0,0 +1,2 @@
+require_xpr64;
+VEC_LOAD(RD, load_int64, RS2);