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[xcc,sim] eliminated vectored traps
[riscv-isa-sim.git]
/
riscv
/
insns
/
mtpcr.h
diff --git
a/riscv/insns/mtpcr.h
b/riscv/insns/mtpcr.h
index bcc613a52f27264f4ce7323252789ad71edd27d0..1a31a32151b08c789b29f29ee567b4836f680295 100644
(file)
--- a/
riscv/insns/mtpcr.h
+++ b/
riscv/insns/mtpcr.h
@@
-9,7
+9,7
@@
switch(insn.rtype.rs2)
epc = RS1;
break;
case 3:
- e
base = RS1 & ~0xFFF
;
+ e
vec = RS1
;
break;
case 4:
count = RS1;