[opcodes, sim, xcc] made *w insns illegal in RV32

[riscv-isa-sim.git] / riscv / insns / slli.h

diff --git a/riscv/insns/slli.h b/riscv/insns/slli.h
index f7ba310d3e3330192c9c9876214dd352081445ea..bfaf4307df06497c9ed10b455f4cc8398772c031 100644 (file)
--- a/riscv/insns/slli.h
+++ b/riscv/insns/slli.h
@@ -1,2 +1,8 @@
-require64;
-RD = RS1 << SHAMT;
+if(xpr64)
+  RD = RS1 << SHAMT;
+else
+{
+  if(SHAMT & 0x20)
+    throw trap_illegal_instruction;
+  RD = sext32(RS1 << SHAMT);
+}