Set badaddr=0 on illegal instruction traps

[riscv-isa-sim.git] / riscv / trap.h

diff --git a/riscv/trap.h b/riscv/trap.h
index 53df4f4033f0fc4e9d2efc17a404aea6e2760c12..91e522396b42d9887372897ed19fe30252672c4a 100644 (file)
--- a/riscv/trap.h
+++ b/riscv/trap.h
@@ -4,6 +4,7 @@
 #define _RISCV_TRAP_H
 
 #include "decode.h"
+#include <stdlib.h>
 
 struct state_t;
 
@@ -12,7 +13,8 @@ class trap_t
  public:
   trap_t(reg_t which) : which(which) {}
   virtual const char* name();
-  virtual void side_effects(state_t* state) {}
+  virtual bool has_badaddr() { return false; }
+  virtual reg_t get_badaddr() { abort(); }
   reg_t cause() { return which; }
  private:
   char _name[16];
@@ -22,12 +24,12 @@ class trap_t
 class mem_trap_t : public trap_t
 {
  public:
-  mem_trap_t(reg_t which, reg_t badvaddr)
-    : trap_t(which), badvaddr(badvaddr) {}
-  void side_effects(state_t* state);
-  reg_t get_badvaddr() { return badvaddr; }
+  mem_trap_t(reg_t which, reg_t badaddr)
+    : trap_t(which), badaddr(badaddr) {}
+  bool has_badaddr() override { return true; }
+  reg_t get_badaddr() override { return badaddr; }
  private:
-  reg_t badvaddr;
+  reg_t badaddr;
 };
 
 #define DECLARE_TRAP(n, x) class trap_##x : public trap_t { \
@@ -38,21 +40,24 @@ class mem_trap_t : public trap_t
 
 #define DECLARE_MEM_TRAP(n, x) class trap_##x : public mem_trap_t { \
  public: \
-  trap_##x(reg_t badvaddr) : mem_trap_t(n, badvaddr) {} \
+  trap_##x(reg_t badaddr) : mem_trap_t(n, badaddr) {} \
   const char* name() { return "trap_"#x; } \
 };
 
 DECLARE_MEM_TRAP(CAUSE_MISALIGNED_FETCH, instruction_address_misaligned)
-DECLARE_MEM_TRAP(CAUSE_FAULT_FETCH, instruction_access_fault)
-DECLARE_TRAP(CAUSE_ILLEGAL_INSTRUCTION, illegal_instruction)
-DECLARE_TRAP(CAUSE_PRIVILEGED_INSTRUCTION, privileged_instruction)
-DECLARE_TRAP(CAUSE_FP_DISABLED, fp_disabled)
-DECLARE_TRAP(CAUSE_SYSCALL, syscall)
-DECLARE_TRAP(CAUSE_BREAKPOINT, breakpoint)
+DECLARE_MEM_TRAP(CAUSE_FETCH_ACCESS, instruction_access_fault)
+DECLARE_MEM_TRAP(CAUSE_ILLEGAL_INSTRUCTION, illegal_instruction)
+DECLARE_MEM_TRAP(CAUSE_BREAKPOINT, breakpoint)
 DECLARE_MEM_TRAP(CAUSE_MISALIGNED_LOAD, load_address_misaligned)
 DECLARE_MEM_TRAP(CAUSE_MISALIGNED_STORE, store_address_misaligned)
-DECLARE_MEM_TRAP(CAUSE_FAULT_LOAD, load_access_fault)
-DECLARE_MEM_TRAP(CAUSE_FAULT_STORE, store_access_fault)
-DECLARE_TRAP(CAUSE_ACCELERATOR_DISABLED, accelerator_disabled)
+DECLARE_MEM_TRAP(CAUSE_LOAD_ACCESS, load_access_fault)
+DECLARE_MEM_TRAP(CAUSE_STORE_ACCESS, store_access_fault)
+DECLARE_TRAP(CAUSE_USER_ECALL, user_ecall)
+DECLARE_TRAP(CAUSE_SUPERVISOR_ECALL, supervisor_ecall)
+DECLARE_TRAP(CAUSE_HYPERVISOR_ECALL, hypervisor_ecall)
+DECLARE_TRAP(CAUSE_MACHINE_ECALL, machine_ecall)
+DECLARE_MEM_TRAP(CAUSE_FETCH_PAGE_FAULT, instruction_page_fault)
+DECLARE_MEM_TRAP(CAUSE_LOAD_PAGE_FAULT, load_page_fault)
+DECLARE_MEM_TRAP(CAUSE_STORE_PAGE_FAULT, store_page_fault)
 
 #endif