[opcodes, sim, xcc] made *w insns illegal in RV32
[riscv-isa-sim.git] / riscv / insns / cvt_s_l.h
2011-01-19 Andrew Waterman[opcodes, sim, xcc] made *w insns illegal in RV32
2010-11-22 Andrew Waterman[opcodes, pk, sim, xcc] Tweaked FP encoding
2010-11-22 Andrew Waterman[xcc, sim, pk, opcodes] new instruction encoding!
2010-10-03 Andrew Waterman[sim, xcc] changed cvt/trunc to use GPRs for int args
2010-09-21 Andrew Waterman[xcc, sim] changed instruction format so imm12 subs...
2010-08-18 Andrew Waterman[sim] integrated SoftFloat-3 with ISA sim; removed...
2010-08-10 Andrew Waterman[xcc,sim] implement FP using softfloat