new supervisor mode
[riscv-isa-sim.git] / riscv / mmu.cc
2012-03-24 Andrew Watermannew supervisor mode
2012-01-31 Andrew Watermandon't set badvaddr for instruction access faults
2012-01-24 Andrew Watermancheck that virtual addresses are sign-extended
2011-11-01 Andrew WatermanFixed tight coupling of host and target page size
2011-06-20 Andrew Watermantemporary undoing of renaming
2011-06-13 Andrew Waterman[sim] renamed to riscv-isa-run
2011-06-12 Andrew Waterman[xcc] tlb now stores host addresses
2011-06-11 Andrew Waterman[xcc] cleaned up mmu code
2011-05-16 Andrew Waterman[sim,pk] cleanups & initial virtual memory support