projects / riscv-isa-sim.git / search
| 2016-05-23 | Tim Newsome | Looks like single step works. |
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| 2016-05-23 | Tim Newsome | Add -H to start halted. |
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| 2016-05-23 | Tim Newsome | Implement binary memory write. |
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| 2016-05-23 | Tim Newsome | Now you can halt/continue from gdb. |
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| 2016-05-23 | Tim Newsome | Register read looks sane now. |
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| 2016-05-23 | Tim Newsome | gdb can now read spike memory. |
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| 2016-05-23 | Tim Newsome | Hack to the point where gdb reads a register. |
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| 2016-05-23 | Tim Newsome | Listen on a socket for gdb to connect to. |
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| 2016-05-19 | Tim Newsome | Merge pull request #42 from csail-csg/master |
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