| 2021-06-05 |
Luke Kenneth Casson... | add coresync_clk to list of HTree
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commit | commitdiff | tree |
| 2021-06-05 |
Luke Kenneth Casson... | add dummy pll to experiments10_verilog
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commit | commitdiff | tree |
| 2021-06-05 |
Luke Kenneth Casson... | set various clocks to use H-Tree
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commit | commitdiff | tree |
| 2021-06-05 |
Luke Kenneth Casson... | add dummy (fake) PLL to experiments10_verilog for testing
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commit | commitdiff | tree |
| 2021-06-03 |
Luke Kenneth Casson... | add 4ksram recon script in tsmc_c018 as well
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commit | commitdiff | tree |
| 2021-06-03 |
Luke Kenneth Casson... | add build_full_4ksram_recon.sh to copy over Staf re...
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commit | commitdiff | tree |
| 2021-06-03 |
Luke Kenneth Casson... | rename sys_clk to sys_clk_0 and rename ref_clk to sys_clk
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commit | commitdiff | tree |
| 2021-06-03 |
Luke Kenneth Casson... | rename ref in fake-pll to ref_v
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commit | commitdiff | tree |
| 2021-06-03 |
Luke Kenneth Casson... | update libresoc.v to use sys_clk for main core
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commit | commitdiff | tree |
| 2021-06-03 |
Luke Kenneth Casson... | change ref to ref_v in PLL (keyword)
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commit | commitdiff | tree |
| 2021-05-27 |
Luke Kenneth Casson... | set other nets to input in fake 4k SRAM cell
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commit | commitdiff | tree |
| 2021-05-27 |
Luke Kenneth Casson... | add TODO into tsmc_c018 coriolis2 settings.py
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commit | commitdiff | tree |
| 2021-05-27 |
Luke Kenneth Casson... | update libresoc.v
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commit | commitdiff | tree |
| 2021-05-27 |
Luke Kenneth Casson... | set fake-mem LibreSOCMem output q as a Net Output
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commit | commitdiff | tree |
| 2021-05-27 |
Luke Kenneth Casson... | set fake PLL Master Cell directions explicitly
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commit | commitdiff | tree |
| 2021-05-26 |
Luke Kenneth Casson... | clk_sel_i in TestIssuer was one bit not 2
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commit | commitdiff | tree |
| 2021-05-26 |
Luke Kenneth Casson... | remove sram4k wb err (unused anyway)
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commit | commitdiff | tree |
| 2021-05-26 |
Luke Kenneth Casson... | appears to be missing libresoc from NETLISTS in Makefile
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commit | commitdiff | tree |
| 2021-05-25 |
Luke Kenneth Casson... | attempt better grid alignment for fake cells
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commit | commitdiff | tree |
| 2021-05-25 |
Luke Kenneth Casson... | change cell sizes to grid layout (?)
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commit | commitdiff | tree |
| 2021-05-25 |
Luke Kenneth Casson... | increase not-connected pads by one
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commit | commitdiff | tree |
| 2021-05-25 |
Luke Kenneth Casson... | add fake pll symlink
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commit | commitdiff | tree |
| 2021-05-25 |
Luke Kenneth Casson... | rename pll out signal to out_v in "fake" pll cell
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commit | commitdiff | tree |
| 2021-05-25 |
Luke Kenneth Casson... | rename PLL out to out_v in test_issuer
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commit | commitdiff | tree |
| 2021-05-25 |
Luke Kenneth Casson... | rename pll blackbox out to out_v
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commit | commitdiff | tree |
| 2021-05-24 |
Luke Kenneth Casson... | disappearing signal from pll, attempt to get it back
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commit | commitdiff | tree |
| 2021-05-24 |
Luke Kenneth Casson... | remove "*" net from fake-pll cell, it ends up in the...
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commit | commitdiff | tree |
| 2021-05-24 |
Luke Kenneth Casson... | round to 0.135 cell grid?
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commit | commitdiff | tree |
| 2021-05-24 |
Luke Kenneth Casson... | rename cell to "real_pll" to avoid conflict with cell...
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commit | commitdiff | tree |
| 2021-05-24 |
Luke Kenneth Casson... | add dummy/fake/ghost PLL blackbox cell
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commit | commitdiff | tree |
| 2021-05-22 |
Luke Kenneth Casson... | rename PLL pad names
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commit | commitdiff | tree |
| 2021-05-22 |
Luke Kenneth Casson... | correct PLL names
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commit | commitdiff | tree |
| 2021-05-22 |
Luke Kenneth Casson... | re-add 4k sram
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commit | commitdiff | tree |
| 2021-05-22 |
Luke Kenneth Casson... | annoying rename of pll analog pin
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commit | commitdiff | tree |
| 2021-05-22 |
Luke Kenneth Casson... | manually rename ls180sram4k module to ls180
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commit | commitdiff | tree |
| 2021-05-22 |
Luke Kenneth Casson... | submodule update
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commit | commitdiff | tree |
| 2021-05-22 |
Luke Kenneth Casson... | update PLL to use submodule Instance
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commit | commitdiff | tree |
| 2021-04-30 |
Luke Kenneth Casson... | do an SRAM search by looking for matching along the...
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commit | commitdiff | tree |
| 2021-04-30 |
Luke Kenneth Casson... | 4k sram build
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commit | commitdiff | tree |
| 2021-04-30 |
Luke Kenneth Casson... | use "make view" not "make vst"
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commit | commitdiff | tree |
| 2021-04-30 |
Luke Kenneth Casson... | add fake LibreSOCMem library to freepdk_c4m45
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commit | commitdiff | tree |
| 2021-04-30 |
Luke Kenneth Casson... | add symlink to "fake" LibreSOCMem
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commit | commitdiff | tree |
| 2021-04-30 |
Luke Kenneth Casson... | enabling experiments9 new LibreSOCMem fake blackbox...
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commit | commitdiff | tree |
| 2021-04-30 |
Luke Kenneth Casson... | using renamed (single) spblock_512w64b8w
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commit | commitdiff | tree |
| 2021-04-30 |
Luke Kenneth Casson... | using new single spblock_512xxx in experiments9
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commit | commitdiff | tree |
| 2021-04-30 |
Luke Kenneth Casson... | add complete series of pins onto fake SRAM
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commit | commitdiff | tree |
| 2021-04-28 |
Luke Kenneth Casson... | first experiment creating a LibreSOCMem library with...
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commit | commitdiff | tree |
| 2021-04-28 |
Luke Kenneth Casson... | create function which pre-creates the blackbox cells
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commit | commitdiff | tree |
| 2021-04-28 |
Luke Kenneth Casson... | name everything back to spblock_512w64b8w now that...
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commit | commitdiff | tree |
| 2021-04-28 |
Luke Kenneth Casson... | rename spblock modules to just straight spblock_512w64b8w...
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commit | commitdiff | tree |
| 2021-04-28 |
Luke Kenneth Casson... | also add createSRAMblocks to freepdk_c4m45
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commit | commitdiff | tree |
| 2021-04-28 |
Luke Kenneth Casson... | add vbe spblock models to non_generated and build scripts
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commit | commitdiff | tree |
| 2021-04-28 |
Luke Kenneth Casson... | shrinking regfile sizes some more
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commit | commitdiff | tree |
| 2021-04-27 |
Luke Kenneth Casson... | add blackbox attribute to spblock512*.v
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commit | commitdiff | tree |
| 2021-04-27 |
Luke Kenneth Casson... | also add blackboxes spblock512* etc.
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commit | commitdiff | tree |
| 2021-04-27 |
Luke Kenneth Casson... | add copying over of spblock*.v and pll.v to build scripts
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commit | commitdiff | tree |
| 2021-04-25 |
Luke Kenneth Casson... | submodule update
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commit | commitdiff | tree |
| 2021-04-24 |
Luke Kenneth Casson... | update submodule
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commit | commitdiff | tree |
| 2021-04-24 |
Luke Kenneth Casson... | cleanup mksyms.sh to include FreePDK_C4M45
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commit | commitdiff | tree |
| 2021-04-24 |
Luke Kenneth Casson... | add export of PDKMASTER_TOP to experiments9/freepdk_c4m45
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commit | commitdiff | tree |
| 2021-04-24 |
Luke Kenneth Casson... | correct relative link to FreePDK45_c4m45, use submodule
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commit | commitdiff | tree |
| 2021-04-22 |
Luke Kenneth Casson... | make placement of SRAMs optional, and PLL as well,...
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commit | commitdiff | tree |
| 2021-04-20 |
Luke Kenneth Casson... | manually comment out pll and sdcard pins
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commit | commitdiff | tree |
| 2021-04-19 |
Luke Kenneth Casson... | add SPBlock512 instance generator
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commit | commitdiff | tree |
| 2021-04-19 |
Luke Kenneth Casson... | code-comments
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commit | commitdiff | tree |
| 2021-04-19 |
Luke Kenneth Casson... | add two SRAMs, document how to do more
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commit | commitdiff | tree |
| 2021-04-18 |
Luke Kenneth Casson... | argh, found the blackbox problem: yosys is "doing the...
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commit | commitdiff | tree |
| 2021-04-18 |
Luke Kenneth Casson... | try renaming spblock without the underscore
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commit | commitdiff | tree |
| 2021-04-18 |
Luke Kenneth Casson... | try changing layout of blackbox spblock_512w64b8w
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commit | commitdiff | tree |
| 2021-04-18 |
Luke Kenneth Casson... | experimenting with blackboxes
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commit | commitdiff | tree |
| 2021-04-18 |
Luke Kenneth Casson... | rename spblock_512w64b8w, and vco_test_ana for pll
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commit | commitdiff | tree |
| 2021-04-18 |
Luke Kenneth Casson... | rename blackboxes to lowercase, spblock_512w64b8w, pll
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commit | commitdiff | tree |
| 2021-04-18 |
Luke Kenneth Casson... | update ls180 sram4k
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commit | commitdiff | tree |
| 2021-04-18 |
Luke Kenneth Casson... | add yosys BLACKBOX SPBlock_512W64B8W - still blif2vst...
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commit | commitdiff | tree |
| 2021-04-18 |
Luke Kenneth Casson... | must use VST_FLAGS uniquify uppercase
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commit | commitdiff | tree |
| 2021-04-18 |
Luke Kenneth Casson... | sort out adding SPBlock_512 SRAM verilog to ls180
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commit | commitdiff | tree |
| 2021-04-18 |
Luke Kenneth Casson... | update tsmc_018 4k build script
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commit | commitdiff | tree |
| 2021-04-18 |
Luke Kenneth Casson... | use correct arguments to litex build to create 4k srams...
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commit | commitdiff | tree |
| 2021-04-18 |
Luke Kenneth Casson... | rename ls180sram4k to ls180
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commit | commitdiff | tree |
| 2021-04-18 |
Luke Kenneth Casson... | add full core variant including 4k sram of ls180
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commit | commitdiff | tree |
| 2021-04-18 |
Luke Kenneth Casson... | update libresoc.v, c4m-jtag fsm was renamed
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commit | commitdiff | tree |
| 2021-04-18 |
Luke Kenneth Casson... | update libresoc.v, c4m-jtag fsm was renamed
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commit | commitdiff | tree |
| 2021-04-14 |
Luke Kenneth Casson... | add an SRAM and wishbone to add test (makes it bigger)
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commit | commitdiff | tree |
| 2021-04-14 |
Luke Kenneth Casson... | connect up boundary scan to inputs/outputs
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commit | commitdiff | tree |
| 2021-04-13 |
Luke Kenneth Casson... | submodule update
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commit | commitdiff | tree |
| 2021-04-13 |
Luke Kenneth Casson... | use METAL10 for topRoutingLayer
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commit | commitdiff | tree |
| 2021-04-13 |
Luke Kenneth Casson... | whoops forgot settings.py
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commit | commitdiff | tree |
| 2021-04-12 |
Luke Kenneth Casson... | submodule update
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commit | commitdiff | tree |
| 2021-04-12 |
Luke Kenneth Casson... | set routingGauge manually
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commit | commitdiff | tree |
| 2021-04-12 |
Luke Kenneth Casson... | enable HFNS in adder
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commit | commitdiff | tree |
| 2021-04-12 |
Luke Kenneth Casson... | include (but do not use) FreePDK45 in experiments10
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commit | commitdiff | tree |
| 2021-04-12 |
Luke Kenneth Casson... | different FreePDK45 experiments10 chip size
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commit | commitdiff | tree |
| 2021-04-12 |
Luke Kenneth Casson... | experimentation to get experiment10_verilog work with...
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commit | commitdiff | tree |
| 2021-04-12 |
Luke Kenneth Casson... | add FreePDK45 experiments10_verilog doDesign.py
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commit | commitdiff | tree |
| 2021-04-12 |
Luke Kenneth Casson... | add FreePDK45 variant of experiments10_verilog
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commit | commitdiff | tree |
| 2021-04-12 |
Luke Kenneth Casson... | update PLL signal output names
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commit | commitdiff | tree |
| 2021-04-12 |
Luke Kenneth Casson... | rename sys_clk in adder test experiments10_verilog...
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commit | commitdiff | tree |
| 2021-04-12 |
Luke Kenneth Casson... | rename JTAG port in adder test experiments10_verilog...
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commit | commitdiff | tree |
| 2021-04-12 |
Luke Kenneth Casson... | back to "working" verilog add
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commit | commitdiff | tree |
| 2021-04-12 |
Luke Kenneth Casson... | another attempt to get 100% completed route
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commit | commitdiff | tree |
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