wrap simple-soft-float section
[crowdsupply.git] / updates / 023_2020mar26_decoder_emulator_started.mdwn
1 So many things happened since the last update they actually need to go
2 in the main update, even in summary form. One big thing: Raptor Engineering
3 sponsored us with remote access to a TALOS II Workstation!
4
5 # Introduction
6
7 Here's the summary (if it can be called a summary):
8
9 * [An announcement](http://lists.libre-riscv.org/pipermail/libre-riscv-dev/2020-March/004995.html)
10 that we got the funding (which is open to anyone - hint, hint) resulted in
11 at least three people reaching out to join the team. "We don't need
12 permission to own our own hardware" got a *really* positive reaction.
13 * New team member, Jock (hello Jock!) starts on the coriolis2 layout,
14 after Jean-Paul from LIP6.fr helped to dramatically improve how coriolis2
15 can be used. This resulted in a
16 [tutorial](https://libre-riscv.org/HDL_workflow/coriolis2/) and a
17 [huge bug report discussion](http://bugs.libre-riscv.org/show_bug.cgi?id=178)
18 * Work has started on the
19 [POWER ISA decoder](http://bugs.libre-riscv.org/show_bug.cgi?id=186),
20 verified through
21 [calling GNU AS](https://git.libre-riscv.org/?p=soc.git;a=blob;f=src/soc/decoder/test/test_decoder_gas.py;h=9238d3878d964907c5569a3468d6895effb7dc02;hb=56d145e42ac75626423915af22d1493f1e7bb143) (yes, really!)
22 and on a mini-simulator
23 [calling QEMU](https://git.libre-riscv.org/?p=soc.git;a=blob;f=src/soc/simulator/qemu.py;h=9eb103bae227e00a2a1d2ec4f43d7e39e4f44960;hb=56d145e42ac75626423915af22d1493f1e7bb143)
24 for verification.
25 * Jacob's simple-soft-float library growing
26 [Power FP compatibility](http://bugs.libre-riscv.org/show_bug.cgi?id=258)
27 and python bindings.
28 * A Conference call with OpenPOWER Foundation Director, Hugh, and Timothy
29 Pearson from RaptorCS has been established every two weeks.
30 * The OpenPOWER Foundation is also running some open
31 ["Virtual Coffee"](https://openpowerfoundation.org/openpower-virtual-coffee-calls/)
32 weekly round-table calls for anyone interested, generally, in OpenPOWER
33 development.
34 * Tim sponsors our team with access to a Monster Talos II system with a
35 whopping 128 GB RAM. htop lists a staggering 72 cores (18 real
36 with 4-way hyperthreading).
37 * [Epic MegaGrants](http://lists.libre-riscv.org/pipermail/libre-riscv-dev/2020-March/005262.html)
38 reached out (hello!) to say they're still considering our
39 request.
40 * A marathon 3-hour session with [NLNet](http://nlnet.nl) resulted
41 in the completion of the
42 [Milestone tasks list(s)](http://bugs.libre-riscv.org/buglist.cgi?component=Milestones&list_id=567&resolution=---)
43 and a
44 [boat-load](http://lists.libre-riscv.org/pipermail/libre-riscv-dev/2020-March/thread.html)
45 of bug reports to the list.
46 * Immanuel Yehowshua is participating in the Georgia Tech
47 [Create-X](https://create-x.gatech.edu/) Programme, and is establishing
48 a Public Benefit Corporation in Atlanta, as an ethical vehicle for VC
49 Funding.
50 * A [Load/Store Buffer](http://bugs.libre-riscv.org/show_bug.cgi?id=216)
51 design and
52 [further discussion](http://bugs.libre-riscv.org/show_bug.cgi?id=257)
53 including on
54 [comp.arch](https://groups.google.com/forum/#!topic/comp.arch/cbGAlcCjiZE)
55 inspired additional writeup
56 on the
57 [6600 scoreboard](https://libre-riscv.org/3d_gpu/architecture/6600scoreboard/)
58 page.
59
60 Well dang, as you can see, suddenly it just went ballistic. There's
61 almost certainly things left off the list. For such a small team there's
62 a heck of a lot going on. We have an awful lot to do, in a short amount
63 of time: the 180nm tape-out is in October 2020 - only 7 months away.
64
65 # NLNet Funding announcement
66
67 TODO
68
69 # Coriolis2 experimentation started
70
71 TODO
72
73 # POWER ISA decoder and Simulator
74
75 TODO
76
77 # simple-soft-float Library and POWER FP emulation
78
79 The [simple-soft-float](https://salsa.debian.org/Kazan-team/simple-soft-float) library is a floating-point library Jacob wrote with the intention
80 of being a reference implementation of IEEE 754 for hardware testing purposes. It's
81 specifically designed to be written to be easier to understand instead of having the
82 code obscured in pursuit of speed:
83
84 * Being easier to understand helps prevent bugs where the code does not
85 match the IEEE spec.
86 * It uses the [algebraics](https://salsa.debian.org/Kazan-team/algebraics) library that Jacob wrote since that allows using numbers
87 that behave like exact real numbers, making reasoning about the code
88 simpler.
89 * It is written in Rust rather than highly-macro-ified C, since that helps with
90 readability since operations aren't obscured, as well as safety, since Rust
91 proves at compile time that the code won't seg-fault unless you specifically
92 opt-out of those guarantees by using `unsafe`.
93
94 It currently supports 16, 32, 64, 128-bit FP for RISC-V, along with having a
95 `DynamicFloat` type which allows dynamically specifying all aspects of how a
96 particular floating-point type behaves -- if one wanted, they could configure it as a
97 2048-bit floating-point type.
98
99 It also has Python bindings, thanks to the awesome [PyO3](https://pyo3.rs/) library for writing Python
100 bindings in Rust.
101
102 We decided to write simple-soft-float instead of extending the industry-standard
103 [Berkeley softfloat](http://www.jhauser.us/arithmetic/SoftFloat.html) library because of a range of issues, including not supporting
104 Power FP, requiring recompilation to switch which ISA is being emulated, not
105 supporting all the required operations, architectural issues such as depending on
106 global variables, etc. We are still testing simple-soft-float against Berkeley softfloat
107 where we can, however, since Berkeley softfloat is widely used and highly likely to
108 be correct.
109
110 simple-soft-float is [gaining support for Power FP](http://bugs.libre-riscv.org/show_bug.cgi?id=258), which requires rewriting a lot of
111 the status-flag handling code since Power supports a much larger set of
112 floating-point status flags and exceptions than most other ISAs.
113
114 Thanks to RaptorCS for giving us remote access to a Power9 system, since that
115 makes it much easier verifying that the test cases are correct.
116
117 API Docs for stable releases of both [simple-soft-float](https://docs.rs/simple-soft-float) and [algebraics](https://docs.rs/algebraics) are available
118 on docs.rs.
119
120 # OpenPOWER Conference calls
121
122 TODO
123
124 # OpenPower Virtual Coffee Meetings
125
126 TODO
127
128 # Sponsorship by RaptorCS with a TALOS II Workstation
129
130 TODO
131
132 # Epic Megagrants
133
134 TODO
135
136 # NLNet Milestone tasks
137
138 TODO
139
140 # Georgia Tech CREATE-X
141
142 TODO
143
144 # LOAD/STORE Buffer and 6600 design documentation
145
146 TODO
147
148 # Conclusion
149
150 TODO
151