sync_up: Added Jacob's comments
[libreriscv.git] / meetings / sync_up / sync_up_2024-01-16.mdwn
1 # Tuesday 16th January 17:00 UTC
2
3 * Previous notes: [[meetings/sync_up/sync_up_2024-01-09]]
4 * Next day's notes: [[meetings/sync_up/sync_up_2024-01-17]]
5 * Next week's notes: [[meetings/sync_up/sync_up_2024-01-23]]
6
7 # Main Agenda
8
9 * reminder of **only 5 weeks** until march 1st deadline
10 for completion of cavatools and cryptoprimitives.
11
12 Discussion of commit frequency and other points mentioned in
13 [this](https://lists.libre-soc.org/pipermail/libre-soc-dev/2024-January/005912.html)
14 email thread. Points to be discussed:
15
16 * Due to length, moved to separate discussion page:
17 [[discussion/sync_up_2024-01-16_discussion]]
18
19 After meeting discussion, points agreed upon will be documented
20 in the wiki.
21
22 FOSDEM:
23
24 * will need volunteers for the devroom:
25 - Watch speaker, keep track of time
26 - Carry mic to audience, keep questions short
27 - Watch the door, make sure talk doesn't get disturbed (people come in
28 in the middle of a talk)
29 * Make sure PDF slides for the talks are:
30 - Uploaded to pretalx platform in good time (two weeks before FOSDEM?)
31 - Resolution set to **1280x800** resolution, preferably 800x600.
32 - Higher-res slides can be uploaded later, but for the actual slides
33 to be used during the event, resolution must be as mentioned above.
34 - Put all PDFs on the laptop to be used for presentations. Make sure
35 we have copies just in case.
36 - More info on slides from Luke:
37 [email archive](https://lists.libre-soc.org/pipermail/libre-soc-dev/2023-December/005892.html)
38
39 Meeting notes:
40
41 * Outstanding Cavatools tasks:
42 - [bug #980](https://bugs.libre-soc.org/show_bug.cgi?id=980)
43 * Outstanding Cryptorouter tasks:
44 - Poly1305, [bug #1157](https://bugs.libre-soc.org/show_bug.cgi?id=1157)
45 [bug #1158](https://bugs.libre-soc.org/show_bug.cgi?id=1158),
46 [bug #1159](https://bugs.libre-soc.org/show_bug.cgi?id=1159)
47 - Ed25519,
48 [bug #1151](https://bugs.libre-soc.org/show_bug.cgi?id=1151),
49 [bug #1166](https://bugs.libre-soc.org/show_bug.cgi?id=1166),
50 [bug #1167](https://bugs.libre-soc.org/show_bug.cgi?id=1167)
51
52 # Dmitry
53
54 - [bug #980](https://bugs.libre-soc.org/show_bug.cgi?id=980)
55 - Still some work required. A few days until
56 - Two types of pseudocode: instructions, python functions
57 - For now provides prototypes for many features
58
59 # Sadoon
60
61 - [bug #1157](https://bugs.libre-soc.org/show_bug.cgi?id=1157)
62 - walkthrough code during meeting.
63
64 Jacob provided great help:
65
66 ```
67 maddedu would be useful if you have a packed 130 bit number in words where the non-msb words have 64-bits per word, the code you had last i checked instead has 44-bits per register used
68 this is the pattern used by the x + y remap mode...which isn't working yet, so svindex is suitable for now
69 maddedu also has carry-out, which you don't have here
70 so maddld is sufficient
71 yes
72 or the x + y remap once that's implemented
73 setup shapes with svindex insn
74 no, those are offset by the register specified in the sv. insn that remap is applied to
75 svindex has element numbers, not x,y,z
76 x,y,z are used for other remap modes
77 yes, use the svindex insn
78 you specify the vector to load element numbers from in the svindex insn
79 but they're accessed with element-sized chunks with element size determined by svindex
80 svindex is if you want only one sv.maddld insn that loops 9 times
81 lemme move to my desktop so i can type easier...
82 ok, so you'll want a mod-3 matrix remap in one SVSHAPE register, and svindex remap in another SVSHAPE register
83 so run svshape to set the matrix remap, then run svindex to overwrite one remap...
84 svshape writes all 4 SVSHAPE registers, svindex can set the SVSHAPE register you specify
85 (or all 4, but you don't want that mode)
86 so test_1_sv_index is an example of what you want...
87 it sets SVSHAPE2
88 encoded in the LSB 2 bits of the operand that's 14
89 the rmm operand
90 see comments immediately above
91 see line 396 of simplev.mdwn for how rmm is used
92 in openpower-isa.git
93 * **SVG** - GPR SVG<<2 to be used for Indexing
94 so if you want the indexes to be in r4,r5,r6... set SVG to 1 which comes out to r4 (1 << 2)
95 yes, a value of zero means use element 0
96 so, if you want remap to use elements 1,2,3,4,5,6,7,8 set the first register to 0x0807060504030201 and use byte elwid
97 the svindex elwid, not the sv.insn elwid, they're independent
98 svremap tells the following sv.insn which SVSHAPE[0-3] register to use for each operand
99 you don't want to set the SVSHAPE register directly, instead put the indexes in GPRs and svindex insn sets SVSHAPE to point to those GPRs
100 ok, so if your indexes are in r4,r5 with byte elements, afaict you want svindex 1, 1, 9, 3, 0, 1, 0 which sets byte mode, sets SVSHAPE1
101 ```
102
103
104 # Andrey
105
106 - Recovering from a cold (worst of it already happened on the weekend,
107 now mostly blocked nose).
108 - [Bug #1048](https://bugs.libre-soc.org/show_bug.cgi?id=1048),
109 Luke and Jacob made comments regarding the summary, I'll work on it
110 when available.
111 - Checked that RfP for Red was paid, so added extra commentary on IRC
112 (continued from walkthrough Luke and I did last month).
113 - [[HDL_workflow/rfp_submission_guide]]
114 - Additional
115 [IRC messages](https://libre-soc.org/irclog/latest.log.html#t2024-01-15T17:58:17)
116 - Created a discussion page for the "git commit frequency" topic that
117 came up last week: [[discussion/sync_up_2024-01-16_discussion]].
118 Announcement on
119 [IRC](https://libre-soc.org/irclog/latest.log.html#t2024-01-15T19:05:24)
120 - TODO:
121 - Change my main email from technepisteme.xyz to the gmail one.
122 - Redo the calendar invites for the sync-up meetings.
123
124 # Jacob
125
126 - so, not a whole lot of news from me, i fixed a
127 extra-parenthesis-in-a-wrong-spot bug for dmitry and fixed a bug
128 luke left, but didn't actually make any coding progress beyond
129 that.
130
131 During call, walked with Sadoon through assembler:
132
133 ```
134 summary: discussing how to best split into sub-word chunks
135 for poly1305
136 > tbh dsrd isn't better than other shifts here
137 It did help with taking the shift remainders and stitching them together which shortened the code quite a bit
138 Also considering doing sv.dsrd instead of two dsrd's since we already use setvl=2 here
139 > sv.dsrd is 8 bytes, just like 2x dsrd
140 But it's a good demo of setvl anyways
141 > yeah, being a good demo doesn't mean there isn't a better demo
142 The better demo is the mul/adds 😃
143 > try using a different register than r0, the simulator may be treating that like (RA|0) and just using r0 in both iterations...
144 ```
145
146 # Sadoon
147
148 * Working through Poly1305 assembler.
149 * Poly1305, [bug #1157](https://bugs.libre-soc.org/show_bug.cgi?id=1157)
150 * Learned to use `dsrd`, done in first half of poly1305_blocks. Had issues with using `sv.dsrd` but it's kind of working now, will use it.
151 * TODO: Make comments on bug #1157.
152
153 * After that, work with the team on presentations as well as my own
154
155 [[!tag meeting2024]]
156 [[!tag meeting_sync_up]]
157