added minerva and chips4makers jtag
[libreriscv.git] / shakti / m_class / JTAG.mdwn
1 # JTAG
2
3 * <https://gitlab.com/Chips4Makers/c4m-jtag> nmigen JTAG
4 * <https://git.libre-soc.org/?p=soc.git;a=blob;f=src/soc/minerva/units/debug/controller.py;h=7304303e577b14eebba15144642eb7bee829e107;hb=a54adcb65bad37b398b11e33a824c7d08c5fe509> minerva nmigen JTAG
5 * <http://processors.wiki.ti.com/index.php/JTAG_(MSP430)#4_Wire_JTAG>
6