Use new NaN discipline
[riscv-isa-sim.git] / hwacha / hwacha_xcpt.h
1 #ifndef _HWACHA_XCPT_H
2 #define _HWACHA_XCPT_H
3
4 #include "encoding.h"
5
6 #define HWACHA_CAUSE_ILLEGAL_CFG CAUSE_ILLEGAL_INSTRUCTION // AUX: 0=illegal nxpr, 1=illegal nfpr
7 #define HWACHA_CAUSE_ILLEGAL_INSTRUCTION CAUSE_ILLEGAL_INSTRUCTION // AUX: instruction
8 #define HWACHA_CAUSE_PRIVILEGED_INSTRUCTION CAUSE_ILLEGAL_INSTRUCTION // AUX: instruction
9 #define HWACHA_CAUSE_TVEC_ILLEGAL_REGID CAUSE_ILLEGAL_INSTRUCTION // AUX: instruction
10 #define HWACHA_CAUSE_VF_MISALIGNED_FETCH CAUSE_MISALIGNED_FETCH // AUX: pc
11 #define HWACHA_CAUSE_VF_FAULT_FETCH CAUSE_FAULT_FETCH // AUX: pc
12 #define HWACHA_CAUSE_VF_ILLEGAL_INSTRUCTION CAUSE_ILLEGAL_INSTRUCTION // AUX: pc
13 #define HWACHA_CAUSE_VF_ILLEGAL_REGID CAUSE_ILLEGAL_INSTRUCTION // AUX: pc
14 #define HWACHA_CAUSE_MISALIGNED_LOAD CAUSE_MISALIGNED_LOAD // AUX: badvaddr
15 #define HWACHA_CAUSE_MISALIGNED_STORE CAUSE_MISALIGNED_STORE // AUX: badvaddr
16 #define HWACHA_CAUSE_FAULT_LOAD CAUSE_FAULT_LOAD // AUX: badvaddr
17 #define HWACHA_CAUSE_FAULT_STORE CAUSE_FAULT_STORE // AUX: badvaddr
18
19 #endif