riscv/debug_module.cc

   1 #include <cassert>
   2
   3 #include "debug_module.h"
   4 #include "debug_defines.h"
   5 #include "opcodes.h"
   6 #include "mmu.h"
   7
   8 #include "debug_rom/debug_rom.h"
   9 #include "debug_rom/debug_rom_defines.h"
  10
  11 #if 1
  12 #  define D(x) x
  13 #else
  14 #  define D(x)
  15 #endif
  16
  17 ///////////////////////// debug_module_t
  18
  19 debug_module_t::debug_module_t(sim_t *sim) : sim(sim)
  20 {
  21   dmcontrol = {0};
  22
  23   dmstatus = {0};
  24   dmstatus.authenticated = 1;
  25   dmstatus.versionlo = 2;
  26
  27   abstractcs = {0};
  28   abstractcs.progsize = progsize;
  29
  30   abstractauto = {0};
  31
  32   memset(halted, 0, sizeof(halted));
  33   memset(debug_rom_flags, 0, sizeof(debug_rom_flags));
  34   memset(resumeack, 0, sizeof(resumeack));
  35   memset(program_buffer, 0, sizeof(program_buffer));
  36   memset(dmdata, 0, sizeof(dmdata));
  37
  38   write32(debug_rom_whereto, 0,
  39           jal(ZERO, debug_abstract_start - DEBUG_ROM_WHERETO));
  40
  41   memset(debug_abstract, 0, sizeof(debug_abstract));
  42
  43 }
  44
  45 void debug_module_t::reset()
  46 {
  47   for (unsigned i = 0; i < sim->nprocs(); i++) {
  48     processor_t *proc = sim->get_core(i);
  49     if (proc)
  50       proc->halt_request = false;
  51   }
  52
  53   dmcontrol = {0};
  54
  55   dmstatus = {0};
  56   dmstatus.authenticated = 1;
  57   dmstatus.versionlo = 2;
  58
  59   abstractcs = {0};
  60   abstractcs.datacount = sizeof(dmdata) / 4;
  61   abstractcs.progsize = progsize;
  62
  63   abstractauto = {0};
  64 }
  65
  66 void debug_module_t::add_device(bus_t *bus) {
  67   bus->add_device(DEBUG_START, this);
  68 }
  69
  70 bool debug_module_t::load(reg_t addr, size_t len, uint8_t* bytes)
  71 {
  72   addr = DEBUG_START + addr;
  73
  74   if (addr >= DEBUG_ROM_ENTRY &&
  75       (addr + len) <= (DEBUG_ROM_ENTRY + debug_rom_raw_len)) {
  76     memcpy(bytes, debug_rom_raw + addr - DEBUG_ROM_ENTRY, len);
  77     return true;
  78   }
  79
  80   if (addr >= DEBUG_ROM_WHERETO && (addr + len) <= (DEBUG_ROM_WHERETO + 4)) {
  81     memcpy(bytes, debug_rom_whereto + addr - DEBUG_ROM_WHERETO, len);
  82     return true;
  83   }
  84
  85   if (addr >= DEBUG_ROM_FLAGS && ((addr + len) <= DEBUG_ROM_FLAGS + 1024)) {
  86     memcpy(bytes, debug_rom_flags + addr - DEBUG_ROM_FLAGS, len);
  87     return true;
  88   }
  89
  90   if (addr >= debug_abstract_start && ((addr + len) <= (debug_abstract_start + sizeof(debug_abstract)))) {
  91     memcpy(bytes, debug_abstract + addr - debug_abstract_start, len);
  92     return true;
  93   }
  94
  95   if (addr >= debug_data_start && (addr + len) <= (debug_data_start + sizeof(dmdata))) {
  96     memcpy(bytes, dmdata + addr - debug_data_start, len);
  97     return true;
  98   }
  99
 100   if (addr >= debug_progbuf_start && ((addr + len) <= (debug_progbuf_start + sizeof(program_buffer)))) {
 101     memcpy(bytes, program_buffer + addr - debug_progbuf_start, len);
 102     return true;
 103   }
 104
 105   fprintf(stderr, "ERROR: invalid load from debug module: %zd bytes at 0x%016"
 106           PRIx64 "\n", len, addr);
 107
 108   return false;
 109 }
 110
 111 bool debug_module_t::store(reg_t addr, size_t len, const uint8_t* bytes)
 112 {
 113
 114   uint8_t id_bytes[4];
 115   uint32_t id = 0;
 116   if (len == 4) {
 117     memcpy(id_bytes, bytes, 4);
 118     id = read32(id_bytes, 0);
 119   }
 120
 121   addr = DEBUG_START + addr;
 122
 123   if (addr >= debug_data_start && (addr + len) <= (debug_data_start + sizeof(dmdata))) {
 124     memcpy(dmdata + addr - debug_data_start, bytes, len);
 125     return true;
 126   }
 127
 128   if (addr >= debug_progbuf_start && ((addr + len) <= (debug_progbuf_start + sizeof(program_buffer)))) {
 129     fprintf(stderr, "Successful write to program buffer %d bytes at %x\n", (int) len, (int) addr);
 130     memcpy(program_buffer + addr - debug_progbuf_start, bytes, len);
 131
 132     return true;
 133   }
 134
 135   if (addr == DEBUG_ROM_HALTED) {
 136     assert (len == 4);
 137     halted[id] = true;
 138     if (dmcontrol.hartsel == id) {
 139         if (0 == (debug_rom_flags[id] & (1 << DEBUG_ROM_FLAG_GO))){
 140           if (dmcontrol.hartsel == id) {
 141               abstractcs.busy = false;
 142           }
 143         }
 144     }
 145     return true;
 146   }
 147
 148   if (addr == DEBUG_ROM_GOING) {
 149     debug_rom_flags[dmcontrol.hartsel] &= ~(1 << DEBUG_ROM_FLAG_GO);
 150     return true;
 151   }
 152
 153   if (addr == DEBUG_ROM_RESUMING) {
 154     assert (len == 4);
 155     halted[id] = false;
 156     resumeack[id] = true;
 157     debug_rom_flags[id] &= ~(1 << DEBUG_ROM_FLAG_RESUME);
 158     return true;
 159   }
 160
 161   if (addr == DEBUG_ROM_EXCEPTION) {
 162     if (abstractcs.cmderr == CMDERR_NONE) {
 163       abstractcs.cmderr = CMDERR_EXCEPTION;
 164     }
 165     return true;
 166   }
 167
 168   fprintf(stderr, "ERROR: invalid store to debug module: %zd bytes at 0x%016"
 169           PRIx64 "\n", len, addr);
 170   return false;
 171 }
 172
 173 void debug_module_t::write32(uint8_t *memory, unsigned int index, uint32_t value)
 174 {
 175   uint8_t* base = memory + index * 4;
 176   base[0] = value & 0xff;
 177   base[1] = (value >> 8) & 0xff;
 178   base[2] = (value >> 16) & 0xff;
 179   base[3] = (value >> 24) & 0xff;
 180 }
 181
 182 uint32_t debug_module_t::read32(uint8_t *memory, unsigned int index)
 183 {
 184   uint8_t* base = memory + index * 4;
 185   uint32_t value = ((uint32_t) base[0]) |
 186     (((uint32_t) base[1]) << 8) |
 187     (((uint32_t) base[2]) << 16) |
 188     (((uint32_t) base[3]) << 24);
 189   return value;
 190 }
 191
 192 processor_t *debug_module_t::current_proc() const
 193 {
 194   processor_t *proc = NULL;
 195   try {
 196     proc = sim->get_core(dmcontrol.hartsel);
 197   } catch (const std::out_of_range&) {
 198   }
 199   return proc;
 200 }
 201
 202 bool debug_module_t::dmi_read(unsigned address, uint32_t *value)
 203 {
 204   uint32_t result = 0;
 205   D(fprintf(stderr, "dmi_read(0x%x) -> ", address));
 206   if (address >= DMI_DATA0 && address < DMI_DATA0 + abstractcs.datacount) {
 207     unsigned i = address - DMI_DATA0;
 208     result = read32(dmdata, i);
 209     if (abstractcs.busy) {
 210       result = -1;
 211       fprintf(stderr, "\ndmi_read(0x%02x (data[%d]) -> -1 because abstractcs.busy==true\n", address, i);
 212     }
 213
 214     if (abstractcs.busy && abstractcs.cmderr == CMDERR_NONE) {
 215       abstractcs.cmderr = CMDERR_BUSY;
 216     }
 217
 218     if (!abstractcs.busy && ((abstractauto.autoexecdata >> i) & 1)) {
 219       perform_abstract_command();
 220     }
 221   } else if (address >= DMI_PROGBUF0 && address < DMI_PROGBUF0 + progsize) {
 222     unsigned i = address - DMI_PROGBUF0;
 223     result = read32(program_buffer, i);
 224     if (abstractcs.busy) {
 225       result = -1;
 226       fprintf(stderr, "\ndmi_read(0x%02x (progbuf[%d]) -> -1 because abstractcs.busy==true\n", address, i);
 227     }
 228     if (!abstractcs.busy && ((abstractauto.autoexecprogbuf >> i) & 1)) {
 229       perform_abstract_command();
 230     }
 231
 232   } else {
 233     switch (address) {
 234       case DMI_DMCONTROL:
 235         {
 236           processor_t *proc = current_proc();
 237           if (proc)
 238             dmcontrol.haltreq = proc->halt_request;
 239
 240           result = set_field(result, DMI_DMCONTROL_HALTREQ, dmcontrol.haltreq);
 241           result = set_field(result, DMI_DMCONTROL_RESUMEREQ, dmcontrol.resumereq);
 242           result = set_field(result, DMI_DMCONTROL_HARTSEL, dmcontrol.hartsel);
 243           result = set_field(result, DMI_DMCONTROL_HARTRESET, dmcontrol.hartreset);
 244           result = set_field(result, DMI_DMCONTROL_NDMRESET, dmcontrol.ndmreset);
 245           result = set_field(result, DMI_DMCONTROL_DMACTIVE, dmcontrol.dmactive);
 246         }
 247         break;
 248       case DMI_DMSTATUS:
 249         {
 250           processor_t *proc = current_proc();
 251
 252           dmstatus.allnonexistant = false;
 253           dmstatus.allunavail = false;
 254           dmstatus.allrunning = false;
 255           dmstatus.allhalted = false;
 256           dmstatus.allresumeack = false;
 257           if (proc) {
 258             if (halted[dmcontrol.hartsel]) {
 259               dmstatus.allhalted = true;
 260             } else {
 261               dmstatus.allrunning = true;
 262             }
 263           } else {
 264             dmstatus.allnonexistant = true;
 265           }
 266           dmstatus.anynonexistant = dmstatus.allnonexistant;
 267           dmstatus.anyunavail = dmstatus.allunavail;
 268           dmstatus.anyrunning = dmstatus.allrunning;
 269           dmstatus.anyhalted = dmstatus.allhalted;
 270           if (proc) {
 271             if (resumeack[dmcontrol.hartsel]) {
 272               dmstatus.allresumeack = true;
 273             } else {
 274               dmstatus.allresumeack = false;
 275             }
 276           } else {
 277             dmstatus.allresumeack = false;
 278           }
 279
 280           result = set_field(result, DMI_DMSTATUS_ALLNONEXISTENT, dmstatus.allnonexistant);
 281           result = set_field(result, DMI_DMSTATUS_ALLUNAVAIL, dmstatus.allunavail);
 282           result = set_field(result, DMI_DMSTATUS_ALLRUNNING, dmstatus.allrunning);
 283           result = set_field(result, DMI_DMSTATUS_ALLHALTED, dmstatus.allhalted);
 284           result = set_field(result, DMI_DMSTATUS_ALLRESUMEACK, dmstatus.allresumeack);
 285           result = set_field(result, DMI_DMSTATUS_ANYNONEXISTENT, dmstatus.anynonexistant);
 286           result = set_field(result, DMI_DMSTATUS_ANYUNAVAIL, dmstatus.anyunavail);
 287           result = set_field(result, DMI_DMSTATUS_ANYRUNNING, dmstatus.anyrunning);
 288           result = set_field(result, DMI_DMSTATUS_ANYHALTED, dmstatus.anyhalted);
 289           result = set_field(result, DMI_DMSTATUS_ANYRESUMEACK, dmstatus.anyresumeack);
 290           result = set_field(result, DMI_DMSTATUS_AUTHENTICATED, dmstatus.authenticated);
 291           result = set_field(result, DMI_DMSTATUS_AUTHBUSY, dmstatus.authbusy);
 292           result = set_field(result, DMI_DMSTATUS_VERSIONHI, dmstatus.versionhi);
 293           result = set_field(result, DMI_DMSTATUS_VERSIONLO, dmstatus.versionlo);
 294         }
 295         break;
 296       case DMI_ABSTRACTCS:
 297         result = set_field(result, DMI_ABSTRACTCS_CMDERR, abstractcs.cmderr);
 298         result = set_field(result, DMI_ABSTRACTCS_BUSY, abstractcs.busy);
 299         result = set_field(result, DMI_ABSTRACTCS_DATACOUNT, abstractcs.datacount);
 300         result = set_field(result, DMI_ABSTRACTCS_PROGSIZE, abstractcs.progsize);
 301         break;
 302       case DMI_ABSTRACTAUTO:
 303         result = set_field(result, DMI_ABSTRACTAUTO_AUTOEXECPROGBUF, abstractauto.autoexecprogbuf);
 304         result = set_field(result, DMI_ABSTRACTAUTO_AUTOEXECDATA, abstractauto.autoexecdata);
 305         break;
 306       case DMI_COMMAND:
 307         result = 0;
 308         break;
 309       case DMI_HARTINFO:
 310         result = set_field(result, DMI_HARTINFO_NSCRATCH, 1);
 311         result = set_field(result, DMI_HARTINFO_DATAACCESS, 1);
 312         result = set_field(result, DMI_HARTINFO_DATASIZE, abstractcs.datacount);
 313         result = set_field(result, DMI_HARTINFO_DATAADDR, debug_data_start);
 314         break;
 315       default:
 316         result = 0;
 317         D(fprintf(stderr, "Unexpected. Returning Error."));
 318         return false;
 319     }
 320   }
 321   D(fprintf(stderr, "0x%x\n", result));
 322   *value = result;
 323   return true;
 324 }
 325
 326 bool debug_module_t::perform_abstract_command()
 327 {
 328   if (abstractcs.cmderr != CMDERR_NONE)
 329     return true;
 330   if (abstractcs.busy) {
 331     abstractcs.cmderr = CMDERR_BUSY;
 332     return true;
 333   }
 334
 335   if ((command >> 24) == 0) {
 336     // register access
 337     unsigned size = get_field(command, AC_ACCESS_REGISTER_SIZE);
 338     bool write = get_field(command, AC_ACCESS_REGISTER_WRITE);
 339     unsigned regno = get_field(command, AC_ACCESS_REGISTER_REGNO);
 340
 341     if (!halted[dmcontrol.hartsel]) {
 342       abstractcs.cmderr = CMDERR_HALTRESUME;
 343       return true;
 344     }
 345
 346     if (get_field(command, AC_ACCESS_REGISTER_TRANSFER)) {
 347
 348       if (regno < 0x1000 || regno >= 0x1020) {
 349         abstractcs.cmderr = CMDERR_NOTSUP;
 350         return true;
 351       }
 352
 353       unsigned regnum = regno - 0x1000;
 354
 355       switch (size) {
 356       case 2:
 357         if (write)
 358           write32(debug_abstract, 0, lw(regnum, ZERO, debug_data_start));
 359         else
 360           write32(debug_abstract, 0, sw(regnum, ZERO, debug_data_start));
 361         break;
 362       case 3:
 363         if (write)
 364           write32(debug_abstract, 0, ld(regnum, ZERO, debug_data_start));
 365         else
 366           write32(debug_abstract, 0, sd(regnum, ZERO, debug_data_start));
 367         break;
 368         /*
 369           case 4:
 370           if (write)
 371           write32(debug_rom_code, 0, lq(regnum, ZERO, debug_data_start));
 372           else
 373           write32(debug_rom_code, 0, sq(regnum, ZERO, debug_data_start));
 374           break;
 375         */
 376       default:
 377         abstractcs.cmderr = CMDERR_NOTSUP;
 378         return true;
 379       }
 380     } else {
 381       //NOP
 382       write32(debug_abstract, 0, addi(ZERO, ZERO, 0));
 383     }
 384
 385     if (get_field(command, AC_ACCESS_REGISTER_POSTEXEC)) {
 386       // Since the next instruction is what we will use, just use nother NOP
 387       // to get there.
 388       write32(debug_abstract, 1, addi(ZERO, ZERO, 0));
 389     } else {
 390       write32(debug_abstract, 1, ebreak());
 391     }
 392
 393     debug_rom_flags[dmcontrol.hartsel] |= 1 << DEBUG_ROM_FLAG_GO;
 394
 395     abstractcs.busy = true;
 396   } else {
 397     abstractcs.cmderr = CMDERR_NOTSUP;
 398   }
 399   return true;
 400 }
 401
 402 bool debug_module_t::dmi_write(unsigned address, uint32_t value)
 403 {
 404   D(fprintf(stderr, "dmi_write(0x%x, 0x%x)\n", address, value));
 405   if (address >= DMI_DATA0 && address < DMI_DATA0 + abstractcs.datacount) {
 406     unsigned i = address - DMI_DATA0;
 407     if (!abstractcs.busy)
 408       write32(dmdata, address - DMI_DATA0, value);
 409
 410     if (abstractcs.busy && abstractcs.cmderr == CMDERR_NONE) {
 411       abstractcs.cmderr = CMDERR_BUSY;
 412     }
 413
 414     if (!abstractcs.busy && ((abstractauto.autoexecdata >> i) & 1)) {
 415       perform_abstract_command();
 416     }
 417     return true;
 418
 419   } else if (address >= DMI_PROGBUF0 && address < DMI_PROGBUF0 + progsize) {
 420     unsigned i = address - DMI_PROGBUF0;
 421
 422     if (!abstractcs.busy)
 423       write32(program_buffer, i, value);
 424
 425     if (!abstractcs.busy && ((abstractauto.autoexecprogbuf >> i) & 1)) {
 426       perform_abstract_command();
 427     }
 428     return true;
 429
 430   } else {
 431     switch (address) {
 432       case DMI_DMCONTROL:
 433         {
 434           dmcontrol.dmactive = get_field(value, DMI_DMCONTROL_DMACTIVE);
 435           if (dmcontrol.dmactive) {
 436             dmcontrol.haltreq = get_field(value, DMI_DMCONTROL_HALTREQ);
 437             dmcontrol.resumereq = get_field(value, DMI_DMCONTROL_RESUMEREQ);
 438             dmcontrol.ndmreset = get_field(value, DMI_DMCONTROL_NDMRESET);
 439             dmcontrol.hartsel = get_field(value, DMI_DMCONTROL_HARTSEL);
 440           } else {
 441             reset();
 442           }
 443           processor_t *proc = current_proc();
 444           if (proc) {
 445             proc->halt_request = dmcontrol.haltreq;
 446             if (dmcontrol.resumereq) {
 447               debug_rom_flags[dmcontrol.hartsel] |= (1 << DEBUG_ROM_FLAG_RESUME);
 448               resumeack[dmcontrol.hartsel] = false;
 449             }
 450             if (dmcontrol.ndmreset) {
 451               proc->reset();
 452             }
 453           }
 454         }
 455         return true;
 456
 457       case DMI_COMMAND:
 458         command = value;
 459         return perform_abstract_command();
 460
 461       case DMI_ABSTRACTCS:
 462         abstractcs.cmderr = (cmderr_t) (((uint32_t) (abstractcs.cmderr)) & (~(uint32_t)(get_field(value, DMI_ABSTRACTCS_CMDERR))));
 463         return true;
 464
 465       case DMI_ABSTRACTAUTO:
 466         abstractauto.autoexecprogbuf = get_field(value,
 467             DMI_ABSTRACTAUTO_AUTOEXECPROGBUF);
 468         abstractauto.autoexecdata = get_field(value,
 469             DMI_ABSTRACTAUTO_AUTOEXECDATA);
 470         return true;
 471     }
 472   }
 473   return false;
 474 }