riscv/debug_module.h

   1 // See LICENSE for license details.
   2 #ifndef _RISCV_DEBUG_MODULE_H
   3 #define _RISCV_DEBUG_MODULE_H
   4
   5 #include <set>
   6
   7 #include "devices.h"
   8
   9 class sim_t;
  10
  11 typedef struct {
  12   bool haltreq;
  13   bool reset;
  14   bool dmactive;
  15   enum {
  16     HARTSTATUS_HALTED,
  17     HARTSTATUS_RUNNING,
  18     HARTSTATUS_UNAVAILABLE,
  19     HARTSTATUS_NOTEXIST
  20   } hartstatus;
  21   unsigned hartsel;
  22   bool authenticated;
  23   bool authbusy;
  24   enum {
  25     AUTHTYPE_NOAUTH,
  26     AUTHTYPE_PASSWORD,
  27     AUTHTYPE_CHALLENGE
  28   } authtype;
  29   unsigned version;
  30 } dmcontrol_t;
  31
  32 class debug_module_t : public abstract_device_t
  33 {
  34   public:
  35     debug_module_t(sim_t *sim);
  36
  37     bool load(reg_t addr, size_t len, uint8_t* bytes);
  38     bool store(reg_t addr, size_t len, const uint8_t* bytes);
  39
  40     void set_interrupt(uint32_t hartid) {
  41       interrupt.insert(hartid);
  42     }
  43     void clear_interrupt(uint32_t hartid) {
  44       interrupt.erase(hartid);
  45     }
  46     bool get_interrupt(uint32_t hartid) const {
  47       return interrupt.find(hartid) != interrupt.end();
  48     }
  49
  50     void set_halt_notification(uint32_t hartid) {
  51       halt_notification.insert(hartid);
  52     }
  53     void clear_halt_notification(uint32_t hartid) {
  54       halt_notification.erase(hartid);
  55     }
  56     bool get_halt_notification(uint32_t hartid) const {
  57       return halt_notification.find(hartid) != halt_notification.end();
  58     }
  59
  60     // Debug Module Interface that the debugger (in our case through JTAG DTM)
  61     // uses to access the DM.
  62     // Return true for success, false for failure.
  63     bool dmi_read(unsigned address, uint32_t *value);
  64     bool dmi_write(unsigned address, uint32_t value);
  65
  66   private:
  67     sim_t *sim;
  68     // Track which interrupts from module to debugger are set.
  69     std::set<uint32_t> interrupt;
  70     // Track which halt notifications from debugger to module are set.
  71     std::set<uint32_t> halt_notification;
  72     uint8_t debug_rom_entry[1024 * 4];
  73
  74     void write32(uint8_t *rom, unsigned int index, uint32_t value);
  75     uint32_t read32(uint8_t *rom, unsigned int index);
  76
  77     static const unsigned datacount = 8;
  78     static const unsigned progsize = 8;
  79
  80     dmcontrol_t dmcontrol;
  81     uint32_t abstractcs;
  82     uint32_t data[datacount];
  83     uint32_t ibuf[progsize];
  84
  85     processor_t *current_proc() const;
  86     void reset();
  87     bool perform_abstract_command(uint32_t command);
  88 };
  89
  90 #endif