1 // See LICENSE for license details.
2 #ifndef _RISCV_DEBUG_MODULE_H
3 #define _RISCV_DEBUG_MODULE_H
9 class debug_module_t
: public abstract_device_t
14 bool load(reg_t addr
, size_t len
, uint8_t* bytes
);
15 bool store(reg_t addr
, size_t len
, const uint8_t* bytes
);
16 char* page(reg_t paddr
);
18 void ram_write32(unsigned int index
, uint32_t value
);
20 void set_interrupt(uint32_t hartid
) {
21 interrupt
.insert(hartid
);
23 void clear_interrupt(uint32_t hartid
) {
24 interrupt
.erase(hartid
);
26 bool get_interrupt(uint32_t hartid
) const {
27 return interrupt
.find(hartid
) != interrupt
.end();
31 // Track which interrupts from module to debugger are set.
32 std::set
<uint32_t> interrupt
;
33 // TODO: use PGSIZE, which requires solving some circular include dependencies.