riscv/decode.h

   1 #ifndef _RISCV_DECODE_H
   2 #define _RISCV_DECODE_H
   3
   4 #include <stdint.h>
   5
   6 #define support_64bit 1
   7 typedef int64_t sreg_t;
   8 typedef uint64_t reg_t;
   9
  10 const int OPCODE_BITS = 6;
  11
  12 const int GPR_BITS = 8*sizeof(reg_t);
  13 const int GPRID_BITS = 5;
  14 const int NGPR = 1 << GPRID_BITS;
  15
  16 const int FPR_BITS = 64;
  17 const int FPRID_BITS = 5;
  18 const int NFPR = 1 << FPRID_BITS;
  19
  20 const int IMM_BITS = 16;
  21 const int TARGET_BITS = 26;
  22 const int SHAMT_BITS = 5;
  23 const int FUNCT_BITS = 6;
  24
  25 #define SR_ET    0x0000000000000001ULL
  26 #define SR_PS    0x0000000000000004ULL
  27 #define SR_S     0x0000000000000008ULL
  28 #define SR_EF    0x0000000000000010ULL
  29 #define SR_UX    0x0000000000000020ULL
  30 #define SR_KX    0x0000000000000040ULL
  31 #define SR_IM    0x000000000000FF00ULL
  32 #define SR_ZERO  0xFFFFFFFFFFFF0082ULL
  33
  34 // note: bit fields are in little-endian order
  35 struct itype_t
  36 {
  37   unsigned imm : IMM_BITS;
  38   unsigned rt : GPRID_BITS;
  39   unsigned rs : GPRID_BITS;
  40   unsigned opcode : OPCODE_BITS;
  41 };
  42
  43 struct jtype_t
  44 {
  45   unsigned target : TARGET_BITS;
  46   unsigned opcode : OPCODE_BITS;
  47 };
  48
  49 struct rtype_t
  50 {
  51   unsigned funct : FUNCT_BITS;
  52   unsigned shamt : SHAMT_BITS;
  53   unsigned rd : GPRID_BITS;
  54   unsigned rt : GPRID_BITS;
  55   unsigned rs : GPRID_BITS;
  56   unsigned opcode : OPCODE_BITS;
  57 };
  58
  59 union insn_t
  60 {
  61   itype_t itype;
  62   jtype_t jtype;
  63   rtype_t rtype;
  64   uint32_t bits;
  65 };
  66
  67 // helpful macros, etc
  68 #define RS R[insn.rtype.rs]
  69 #define RT R[insn.rtype.rt]
  70 #define RD R[insn.rtype.rd]
  71 #define IMM insn.itype.imm
  72 #define SIMM ((int16_t)insn.itype.imm)
  73 #define SHAMT insn.rtype.shamt
  74 #define TARGET insn.jtype.target
  75 #define BRANCH_TARGET (npc + (SIMM*sizeof(insn_t)))
  76 #define JUMP_TARGET ((npc & ~((1<<TARGET_BITS)-1)) + TARGET*sizeof(insn_t))
  77
  78 #define require_supervisor if(!(sr & SR_S)) throw trap_privileged_instruction
  79 #define require64 if(gprlen != 64) throw trap_illegal_instruction
  80 #define cmp_trunc(reg) (reg_t(reg) << (64-gprlen))
  81
  82 static inline sreg_t sext32(int32_t arg)
  83 {
  84   return arg;
  85 }
  86
  87 #endif