Remove MTIME[CMP]; add RTC device
[riscv-isa-sim.git] / riscv / devices.h
1 #ifndef _RISCV_DEVICES_H
2 #define _RISCV_DEVICES_H
3
4 #include "decode.h"
5 #include <map>
6 #include <vector>
7
8 class processor_t;
9
10 class abstract_device_t {
11 public:
12 virtual bool load(reg_t addr, size_t len, uint8_t* bytes) = 0;
13 virtual bool store(reg_t addr, size_t len, const uint8_t* bytes) = 0;
14 virtual ~abstract_device_t() {}
15 };
16
17 class bus_t : public abstract_device_t {
18 public:
19 bool load(reg_t addr, size_t len, uint8_t* bytes);
20 bool store(reg_t addr, size_t len, const uint8_t* bytes);
21 void add_device(reg_t addr, abstract_device_t* dev);
22
23 private:
24 std::map<reg_t, abstract_device_t*> devices;
25 };
26
27 class rom_device_t : public abstract_device_t {
28 public:
29 rom_device_t(std::vector<char> data);
30 bool load(reg_t addr, size_t len, uint8_t* bytes);
31 bool store(reg_t addr, size_t len, const uint8_t* bytes);
32 const std::vector<char>& contents() { return data; }
33 private:
34 std::vector<char> data;
35 };
36
37 class rtc_t : public abstract_device_t {
38 public:
39 rtc_t(std::vector<processor_t*>&);
40 bool load(reg_t addr, size_t len, uint8_t* bytes);
41 bool store(reg_t addr, size_t len, const uint8_t* bytes);
42 size_t size() { return regs.size() * sizeof(regs[0]); }
43 void increment(reg_t inc);
44 private:
45 std::vector<processor_t*>& procs;
46 std::vector<uint64_t> regs;
47 uint64_t time() { return regs[0]; }
48 };
49
50 #endif