Added commit logging (--enable-commitlog). Also fixed disasm bug.
[riscv-isa-sim.git] / riscv / disasm.cc
1 // See LICENSE for license details.
2
3 #include "disasm.h"
4 #include <string>
5 #include <vector>
6 #include <cstdarg>
7 #include <sstream>
8 #include <stdlib.h>
9 using namespace std;
10
11 class arg_t
12 {
13 public:
14 virtual string to_string(insn_t val) const = 0;
15 virtual ~arg_t() {}
16 };
17
18 static const char* xpr[] = {
19 "zero", "ra", "s0", "s1", "s2", "s3", "s4", "s5",
20 "s6", "s7", "s8", "s9", "s10", "s11", "sp", "tp",
21 "v0", "v1", "a0", "a1", "a2", "a3", "a4", "a5",
22 "a6", "a7", "t0", "t1", "t2", "t3", "t4", "gp"
23 };
24
25 static const char* fpr[] = {
26 "fs0", "fs1", "fs2", "fs3", "fs4", "fs5", "fs6", "fs7",
27 "fs8", "fs9", "fs10", "fs11", "fs12", "fs13", "fs14", "fs15",
28 "fv0", "fv1", "fa0", "fa1", "fa2", "fa3", "fa4", "fa5",
29 "fa6", "fa7", "ft0", "ft1", "ft2", "ft3", "ft4", "ft5"
30 };
31
32 static const char* vxpr[] = {
33 "vx0", "vx1", "vx2", "vx3", "vx4", "vx5", "vx6", "vx7",
34 "vx8", "vx9", "vx10", "vx11", "vx12", "vx13", "vx14", "vx15",
35 "vx16", "vx17", "vx18", "vx19", "vx20", "vx21", "vx22", "vx23",
36 "vx24", "vx25", "vx26", "vx27", "vx28", "vx29", "vx30", "vx31"
37 };
38
39 static const char* vfpr[] = {
40 "vf0", "vf1", "vf2", "vf3", "vf4", "vf5", "vf6", "vf7",
41 "vf8", "vf9", "vf10", "vf11", "vf12", "vf13", "vf14", "vf15",
42 "vf16", "vf17", "vf18", "vf19", "vf20", "vf21", "vf22", "vf23",
43 "vf24", "vf25", "vf26", "vf27", "vf28", "vf29", "vf30", "vf31"
44 };
45
46 struct : public arg_t {
47 string to_string(insn_t insn) const {
48 return ::to_string((int)insn.i_imm()) + '(' + xpr[insn.rs1()] + ')';
49 }
50 } load_address;
51
52 struct : public arg_t {
53 string to_string(insn_t insn) const {
54 return ::to_string((int)insn.s_imm()) + '(' + xpr[insn.rs1()] + ')';
55 }
56 } store_address;
57
58 struct : public arg_t {
59 string to_string(insn_t insn) const {
60 return string("0(") + xpr[insn.rs1()] + ')';
61 }
62 } amo_address;
63
64 struct : public arg_t {
65 std::string to_string(insn_t insn) const {
66 return xpr[insn.rd()];
67 }
68 } xrd;
69
70 struct : public arg_t {
71 std::string to_string(insn_t insn) const {
72 return xpr[insn.rs1()];
73 }
74 } xrs1;
75
76 struct : public arg_t {
77 std::string to_string(insn_t insn) const {
78 return xpr[insn.rs2()];
79 }
80 } xrs2;
81
82 struct : public arg_t {
83 std::string to_string(insn_t insn) const {
84 return fpr[insn.rd()];
85 }
86 } frd;
87
88 struct : public arg_t {
89 std::string to_string(insn_t insn) const {
90 return fpr[insn.rs1()];
91 }
92 } frs1;
93
94 struct : public arg_t {
95 std::string to_string(insn_t insn) const {
96 return fpr[insn.rs2()];
97 }
98 } frs2;
99
100 struct : public arg_t {
101 std::string to_string(insn_t insn) const {
102 return fpr[insn.rs3()];
103 }
104 } frs3;
105
106 struct : public arg_t {
107 std::string to_string(insn_t insn) const {
108 return vxpr[insn.rd()];
109 }
110 } vxrd;
111
112 struct : public arg_t {
113 std::string to_string(insn_t insn) const {
114 return vxpr[insn.rs1()];
115 }
116 } vxrs1;
117
118 struct : public arg_t {
119 std::string to_string(insn_t insn) const {
120 return vfpr[insn.rd()];
121 }
122 } vfrd;
123
124 struct : public arg_t {
125 std::string to_string(insn_t insn) const {
126 return vfpr[insn.rs1()];
127 }
128 } vfrs1;
129
130 struct : public arg_t {
131 std::string to_string(insn_t insn) const {
132 return ::to_string(insn.i_imm() & 0x3f);
133 }
134 } nxregs;
135
136 struct : public arg_t {
137 std::string to_string(insn_t insn) const {
138 return ::to_string((insn.i_imm() >> 6) & 0x3f);
139 }
140 } nfregs;
141
142 struct : public arg_t {
143 std::string to_string(insn_t insn) const {
144 return string("pcr") + xpr[insn.rs1()];
145 }
146 } pcr;
147
148 struct : public arg_t {
149 std::string to_string(insn_t insn) const {
150 return ::to_string((int)insn.i_imm());
151 }
152 } imm;
153
154 struct : public arg_t {
155 std::string to_string(insn_t insn) const {
156 std::stringstream s;
157 s << std::hex << "0x" << ((uint32_t)insn.u_imm() >> 12);
158 return s.str();
159 }
160 } bigimm;
161
162 struct : public arg_t {
163 std::string to_string(insn_t insn) const {
164 std::stringstream s;
165 int32_t target = insn.sb_imm();
166 char sign = target >= 0 ? '+' : '-';
167 s << "pc " << sign << ' ' << abs(target);
168 return s.str();
169 }
170 } branch_target;
171
172 struct : public arg_t {
173 std::string to_string(insn_t insn) const {
174 std::stringstream s;
175 int32_t target = insn.sb_imm();
176 char sign = target >= 0 ? '+' : '-';
177 s << "pc " << sign << std::hex << " 0x" << abs(target);
178 return s.str();
179 }
180 } jump_target;
181
182 class disasm_insn_t
183 {
184 public:
185 disasm_insn_t(const char* name, uint32_t match, uint32_t mask,
186 const std::vector<const arg_t*>& args)
187 : match(match), mask(mask), args(args), name(name) {}
188
189 bool operator == (insn_t insn) const
190 {
191 return (insn.bits() & mask) == match;
192 }
193
194 std::string to_string(insn_t insn) const
195 {
196 std::stringstream s;
197 int len;
198 for (len = 0; name[len]; len++)
199 s << (name[len] == '_' ? '.' : name[len]);
200
201 if (args.size())
202 {
203 s << std::string(std::max(1, 8 - len), ' ');
204 for (size_t i = 0; i < args.size()-1; i++)
205 s << args[i]->to_string(insn) << ", ";
206 s << args[args.size()-1]->to_string(insn);
207 }
208 return s.str();
209 }
210
211 uint32_t get_match() const { return match; }
212 uint32_t get_mask() const { return mask; }
213
214 private:
215 uint32_t match;
216 uint32_t mask;
217 std::vector<const arg_t*> args;
218 const char* name;
219 };
220
221 std::string disassembler::disassemble(insn_t insn)
222 {
223 const disasm_insn_t* disasm_insn = lookup(insn);
224 return disasm_insn ? disasm_insn->to_string(insn) : "unknown";
225 }
226
227 disassembler::disassembler()
228 {
229 const uint32_t mask_rd = 0x1fUL << 7;
230 const uint32_t match_rd_ra = 1UL << 7;
231 const uint32_t mask_rs1 = 0x1fUL << 15;
232 const uint32_t match_rs1_ra = 1UL << 15;
233 const uint32_t mask_rs2 = 0x1fUL << 15;
234 const uint32_t mask_imm = 0xfffUL << 20;
235
236 #define DECLARE_INSN(code, match, mask) \
237 const uint32_t match_##code = match; \
238 const uint32_t mask_##code = mask;
239 #include "opcodes.h"
240 #undef DECLARE_INSN
241
242 // explicit per-instruction disassembly
243 #define DISASM_INSN(name, code, extra, ...) \
244 add_insn(new disasm_insn_t(name, match_##code, mask_##code | (extra), __VA_ARGS__));
245 #define DEFINE_NOARG(code) \
246 add_insn(new disasm_insn_t(#code, match_##code, mask_##code, {}));
247 #define DEFINE_DTYPE(code) DISASM_INSN(#code, code, 0, {&xrd})
248 #define DEFINE_RTYPE(code) DISASM_INSN(#code, code, 0, {&xrd, &xrs1, &xrs2})
249 #define DEFINE_ITYPE(code) DISASM_INSN(#code, code, 0, {&xrd, &xrs1, &imm})
250 #define DEFINE_I0TYPE(name, code) DISASM_INSN(name, code, mask_rs1, {&xrd, &imm})
251 #define DEFINE_I1TYPE(name, code) DISASM_INSN(name, code, mask_imm, {&xrd, &xrs1})
252 #define DEFINE_I2TYPE(name, code) DISASM_INSN(name, code, mask_rd | mask_imm, {&xrs1})
253 #define DEFINE_LTYPE(code) DISASM_INSN(#code, code, 0, {&xrd, &bigimm})
254 #define DEFINE_BTYPE(code) DISASM_INSN(#code, code, 0, {&xrs1, &xrs2, &branch_target})
255 #define DEFINE_B0TYPE(name, code) DISASM_INSN(name, code, mask_rs1 | mask_rs2, {&branch_target})
256 #define DEFINE_B1TYPE(name, code) DISASM_INSN(name, code, mask_rs2, {&xrs1, &branch_target})
257 #define DEFINE_XLOAD(code) DISASM_INSN(#code, code, 0, {&xrd, &load_address})
258 #define DEFINE_XSTORE(code) DISASM_INSN(#code, code, 0, {&xrs2, &store_address})
259 #define DEFINE_XAMO(code) DISASM_INSN(#code, code, 0, {&xrd, &xrs2, &amo_address})
260 #define DEFINE_FLOAD(code) DISASM_INSN(#code, code, 0, {&frd, &load_address})
261 #define DEFINE_FSTORE(code) DISASM_INSN(#code, code, 0, {&frs2, &store_address})
262 #define DEFINE_FRTYPE(code) DISASM_INSN(#code, code, 0, {&frd, &frs1, &frs2})
263 #define DEFINE_FR1TYPE(code) DISASM_INSN(#code, code, 0, {&frd, &frs1})
264 #define DEFINE_FR3TYPE(code) DISASM_INSN(#code, code, 0, {&frd, &frs1, &frs2, &frs3})
265 #define DEFINE_FXTYPE(code) DISASM_INSN(#code, code, 0, {&xrd, &frs1})
266 #define DEFINE_XFTYPE(code) DISASM_INSN(#code, code, 0, {&frd, &xrs1})
267
268 DEFINE_XLOAD(lb)
269 DEFINE_XLOAD(lbu)
270 DEFINE_XLOAD(lh)
271 DEFINE_XLOAD(lhu)
272 DEFINE_XLOAD(lw)
273 DEFINE_XLOAD(lwu)
274 DEFINE_XLOAD(ld)
275
276 DEFINE_XSTORE(sb)
277 DEFINE_XSTORE(sh)
278 DEFINE_XSTORE(sw)
279 DEFINE_XSTORE(sd)
280
281 DEFINE_XAMO(amoadd_w)
282 DEFINE_XAMO(amoswap_w)
283 DEFINE_XAMO(amoand_w)
284 DEFINE_XAMO(amoor_w)
285 DEFINE_XAMO(amomin_w)
286 DEFINE_XAMO(amomax_w)
287 DEFINE_XAMO(amominu_w)
288 DEFINE_XAMO(amomaxu_w)
289 DEFINE_XAMO(amoadd_d)
290 DEFINE_XAMO(amoswap_d)
291 DEFINE_XAMO(amoand_d)
292 DEFINE_XAMO(amoor_d)
293 DEFINE_XAMO(amomin_d)
294 DEFINE_XAMO(amomax_d)
295 DEFINE_XAMO(amominu_d)
296 DEFINE_XAMO(amomaxu_d)
297
298 DEFINE_XAMO(lr_w)
299 DEFINE_XAMO(sc_w)
300 DEFINE_XAMO(lr_d)
301 DEFINE_XAMO(sc_d)
302
303 DEFINE_FLOAD(flw)
304 DEFINE_FLOAD(fld)
305
306 DEFINE_FSTORE(fsw)
307 DEFINE_FSTORE(fsd)
308
309 add_insn(new disasm_insn_t("j", match_jal, mask_jal | mask_rd, {&jump_target}));
310 add_insn(new disasm_insn_t("jal", match_jal | match_rd_ra, mask_jal | mask_rd, {&jump_target}));
311 add_insn(new disasm_insn_t("jal", match_jal, mask_jal, {&xrd, &jump_target}));
312
313 DEFINE_B0TYPE("b", beq);
314 DEFINE_B1TYPE("beqz", beq);
315 DEFINE_B1TYPE("bnez", bne);
316 DEFINE_B1TYPE("bltz", blt);
317 DEFINE_B1TYPE("bgez", bge);
318 DEFINE_BTYPE(beq)
319 DEFINE_BTYPE(bne)
320 DEFINE_BTYPE(blt)
321 DEFINE_BTYPE(bge)
322 DEFINE_BTYPE(bltu)
323 DEFINE_BTYPE(bgeu)
324
325 DEFINE_LTYPE(lui);
326 DEFINE_LTYPE(auipc);
327
328 DEFINE_I2TYPE("jr", jalr);
329 add_insn(new disasm_insn_t("jalr", match_jalr | match_rd_ra, mask_jalr | mask_rd | mask_imm, {&xrs1}));
330 add_insn(new disasm_insn_t("ret", match_jalr | match_rs1_ra, mask_jalr | mask_rd | mask_rs1 | mask_imm, {}));
331 DEFINE_ITYPE(jalr);
332
333 add_insn(new disasm_insn_t("nop", match_addi, mask_addi | mask_rd | mask_rs1 | mask_imm, {}));
334 DEFINE_I0TYPE("li", addi);
335 DEFINE_I1TYPE("move", addi);
336 DEFINE_ITYPE(addi);
337 DEFINE_ITYPE(slli);
338 DEFINE_ITYPE(slti);
339 DEFINE_ITYPE(sltiu);
340 DEFINE_ITYPE(xori);
341 DEFINE_ITYPE(srli);
342 DEFINE_ITYPE(srai);
343 DEFINE_ITYPE(ori);
344 DEFINE_ITYPE(andi);
345 DEFINE_ITYPE(addiw);
346 DEFINE_ITYPE(slliw);
347 DEFINE_ITYPE(srliw);
348 DEFINE_ITYPE(sraiw);
349
350 DEFINE_RTYPE(add);
351 DEFINE_RTYPE(sub);
352 DEFINE_RTYPE(sll);
353 DEFINE_RTYPE(slt);
354 DEFINE_RTYPE(sltu);
355 DEFINE_RTYPE(xor);
356 DEFINE_RTYPE(srl);
357 DEFINE_RTYPE(sra);
358 DEFINE_RTYPE(or);
359 DEFINE_RTYPE(and);
360 DEFINE_RTYPE(mul);
361 DEFINE_RTYPE(mulh);
362 DEFINE_RTYPE(mulhu);
363 DEFINE_RTYPE(mulhsu);
364 DEFINE_RTYPE(div);
365 DEFINE_RTYPE(divu);
366 DEFINE_RTYPE(rem);
367 DEFINE_RTYPE(remu);
368 DEFINE_RTYPE(addw);
369 DEFINE_RTYPE(subw);
370 DEFINE_RTYPE(sllw);
371 DEFINE_RTYPE(srlw);
372 DEFINE_RTYPE(sraw);
373 DEFINE_RTYPE(mulw);
374 DEFINE_RTYPE(divw);
375 DEFINE_RTYPE(divuw);
376 DEFINE_RTYPE(remw);
377 DEFINE_RTYPE(remuw);
378
379 DEFINE_NOARG(syscall);
380 DEFINE_NOARG(break);
381 DEFINE_NOARG(fence);
382 DEFINE_NOARG(fence_i);
383
384 DEFINE_DTYPE(rdcycle);
385 DEFINE_DTYPE(rdtime);
386 DEFINE_DTYPE(rdinstret);
387
388 add_insn(new disasm_insn_t("mtpcr", match_mtpcr, mask_mtpcr | mask_rd, {&xrs2, &pcr}));
389 add_insn(new disasm_insn_t("mtpcr", match_mtpcr, mask_mtpcr, {&xrd, &xrs2, &pcr}));
390 add_insn(new disasm_insn_t("mfpcr", match_mfpcr, mask_mfpcr, {&xrd, &pcr}));
391 add_insn(new disasm_insn_t("setpcr", match_setpcr, mask_setpcr, {&xrd, &pcr, &imm}));
392 add_insn(new disasm_insn_t("clearpcr", match_clearpcr, mask_clearpcr, {&xrd, &pcr, &imm}));
393 DEFINE_NOARG(eret)
394
395 DEFINE_FRTYPE(fadd_s);
396 DEFINE_FRTYPE(fsub_s);
397 DEFINE_FRTYPE(fmul_s);
398 DEFINE_FRTYPE(fdiv_s);
399 DEFINE_FR1TYPE(fsqrt_s);
400 DEFINE_FRTYPE(fmin_s);
401 DEFINE_FRTYPE(fmax_s);
402 DEFINE_FR3TYPE(fmadd_s);
403 DEFINE_FR3TYPE(fmsub_s);
404 DEFINE_FR3TYPE(fnmadd_s);
405 DEFINE_FR3TYPE(fnmsub_s);
406 DEFINE_FRTYPE(fsgnj_s);
407 DEFINE_FRTYPE(fsgnjn_s);
408 DEFINE_FRTYPE(fsgnjx_s);
409 DEFINE_FR1TYPE(fcvt_s_d);
410 DEFINE_XFTYPE(fcvt_s_l);
411 DEFINE_XFTYPE(fcvt_s_lu);
412 DEFINE_XFTYPE(fcvt_s_w);
413 DEFINE_XFTYPE(fcvt_s_wu);
414 DEFINE_XFTYPE(fcvt_s_wu);
415 DEFINE_XFTYPE(fmv_s_x);
416 DEFINE_FXTYPE(fcvt_l_s);
417 DEFINE_FXTYPE(fcvt_lu_s);
418 DEFINE_FXTYPE(fcvt_w_s);
419 DEFINE_FXTYPE(fcvt_wu_s);
420 DEFINE_FXTYPE(fmv_x_s);
421 DEFINE_FXTYPE(feq_s);
422 DEFINE_FXTYPE(flt_s);
423 DEFINE_FXTYPE(fle_s);
424
425 DEFINE_FRTYPE(fadd_d);
426 DEFINE_FRTYPE(fsub_d);
427 DEFINE_FRTYPE(fmul_d);
428 DEFINE_FRTYPE(fdiv_d);
429 DEFINE_FR1TYPE(fsqrt_d);
430 DEFINE_FRTYPE(fmin_d);
431 DEFINE_FRTYPE(fmax_d);
432 DEFINE_FR3TYPE(fmadd_d);
433 DEFINE_FR3TYPE(fmsub_d);
434 DEFINE_FR3TYPE(fnmadd_d);
435 DEFINE_FR3TYPE(fnmsub_d);
436 DEFINE_FRTYPE(fsgnj_d);
437 DEFINE_FRTYPE(fsgnjn_d);
438 DEFINE_FRTYPE(fsgnjx_d);
439 DEFINE_FR1TYPE(fcvt_d_s);
440 DEFINE_XFTYPE(fcvt_d_l);
441 DEFINE_XFTYPE(fcvt_d_lu);
442 DEFINE_XFTYPE(fcvt_d_w);
443 DEFINE_XFTYPE(fcvt_d_wu);
444 DEFINE_XFTYPE(fcvt_d_wu);
445 DEFINE_XFTYPE(fmv_d_x);
446 DEFINE_FXTYPE(fcvt_l_d);
447 DEFINE_FXTYPE(fcvt_lu_d);
448 DEFINE_FXTYPE(fcvt_w_d);
449 DEFINE_FXTYPE(fcvt_wu_d);
450 DEFINE_FXTYPE(fmv_x_d);
451 DEFINE_FXTYPE(feq_d);
452 DEFINE_FXTYPE(flt_d);
453 DEFINE_FXTYPE(fle_d);
454
455 add_insn(new disasm_insn_t("fssr", match_fssr, mask_fssr | mask_rd, {&xrs1}));
456 add_insn(new disasm_insn_t("fssr", match_fssr, mask_fssr, {&xrd, &xrs1}));
457 DEFINE_DTYPE(frsr);
458
459 // provide a default disassembly for all instructions as a fallback
460 #define DECLARE_INSN(code, match, mask) \
461 add_insn(new disasm_insn_t(#code " (args unknown)", match, mask, {}));
462 #include "opcodes.h"
463 #undef DECLARE_INSN
464 }
465
466 const disasm_insn_t* disassembler::lookup(insn_t insn)
467 {
468 size_t idx = insn.bits() % HASH_SIZE;
469 for (size_t j = 0; j < chain[idx].size(); j++)
470 if(*chain[idx][j] == insn)
471 return chain[idx][j];
472
473 idx = HASH_SIZE;
474 for (size_t j = 0; j < chain[idx].size(); j++)
475 if(*chain[idx][j] == insn)
476 return chain[idx][j];
477
478 return NULL;
479 }
480
481 void disassembler::add_insn(disasm_insn_t* insn)
482 {
483 size_t idx = HASH_SIZE;
484 if (insn->get_mask() % HASH_SIZE == HASH_SIZE - 1)
485 idx = insn->get_match() % HASH_SIZE;
486 chain[idx].push_back(insn);
487 }
488
489 disassembler::~disassembler()
490 {
491 for (size_t i = 0; i < HASH_SIZE+1; i++)
492 for (size_t j = 0; j < chain[i].size(); j++)
493 delete chain[i][j];
494 }