Merge pull request #117 from riscv/multicore_debug
[riscv-isa-sim.git] / riscv / extension.h
1 // See LICENSE for license details.
2
3 #ifndef _RISCV_COPROCESSOR_H
4 #define _RISCV_COPROCESSOR_H
5
6 #include "processor.h"
7 #include "disasm.h"
8 #include <vector>
9 #include <functional>
10
11 class extension_t
12 {
13 public:
14 virtual std::vector<insn_desc_t> get_instructions() = 0;
15 virtual std::vector<disasm_insn_t*> get_disasms() = 0;
16 virtual const char* name() = 0;
17 virtual void reset() {};
18 virtual void set_debug(bool value) {};
19 virtual ~extension_t();
20
21 void set_processor(processor_t* _p) { p = _p; }
22 protected:
23 processor_t* p;
24
25 void illegal_instruction();
26 void raise_interrupt();
27 void clear_interrupt();
28 };
29
30 std::function<extension_t*()> find_extension(const char* name);
31 void register_extension(const char* name, std::function<extension_t*()> f);
32
33 #define REGISTER_EXTENSION(name, constructor) \
34 class register_##name { \
35 public: register_##name() { register_extension(#name, constructor); } \
36 }; static register_##name dummy_##name;
37
38 #endif