[xcc] minor performance tweaks
[riscv-isa-sim.git] / riscv / icsim.h
1 #ifndef _RISCV_ICSIM_H
2 #define _RISCV_ICSIM_H
3
4 #include <cstring>
5 #include <string>
6 #include <stdint.h>
7
8 class lfsr_t
9 {
10 public:
11 lfsr_t() : reg(1) {}
12 lfsr_t(const lfsr_t& lfsr) : reg(lfsr.reg) {}
13 uint32_t next() { return reg = (reg>>1)^(-(reg&1) & 0xd0000001); }
14 private:
15 uint32_t reg;
16 };
17
18 class icsim_t
19 {
20 public:
21 icsim_t(size_t sets, size_t ways, size_t linesz, const char* name);
22 icsim_t(const icsim_t& rhs);
23 ~icsim_t();
24
25 void tick(uint64_t pc, int insnlen, bool store);
26 void print_stats();
27 private:
28 lfsr_t lfsr;
29
30 size_t sets;
31 size_t ways;
32 size_t linesz;
33 size_t idx_shift;
34 size_t idx_mask;
35
36 uint64_t* tags;
37
38 uint64_t read_accesses;
39 uint64_t read_misses;
40 uint64_t bytes_read;
41 uint64_t write_accesses;
42 uint64_t write_misses;
43 uint64_t bytes_written;
44 uint64_t writebacks;
45
46 std::string name;
47
48 static const uint64_t VALID = 1ULL << 63;
49 static const uint64_t DIRTY = 1ULL << 62;
50 };
51
52 #endif